From patchwork Fri May 26 07:38:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 9749831 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 412296037E for ; Fri, 26 May 2017 07:39:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 31560281B7 for ; Fri, 26 May 2017 07:39:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 25EA7283BF; Fri, 26 May 2017 07:39:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 18F54281B7 for ; Fri, 26 May 2017 07:39:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1035346AbdEZHjD (ORCPT ); Fri, 26 May 2017 03:39:03 -0400 Received: from mail-pf0-f181.google.com ([209.85.192.181]:36082 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1035384AbdEZHi7 (ORCPT ); Fri, 26 May 2017 03:38:59 -0400 Received: by mail-pf0-f181.google.com with SMTP id m17so4087327pfg.3 for ; Fri, 26 May 2017 00:38:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oKZuGARDabkKk0KFrbaiazCbfww3IQtHeveQuqvAKUw=; b=kIUWRSk9YDLaAEvCp+zKyBCNYXat4Wl2qRLxu5++ctBMMNIU5PSu6xYcIre07ltF+h A9xuhJRiWrmzschABU/K5F0+p38z1MWYQyI7jMsIE8r6ieytCD6e+bi0WUkgfsJSXMYS 4z7P7rJbmrWXTRvUqSNh/VeP6DWYAgKffeLjs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oKZuGARDabkKk0KFrbaiazCbfww3IQtHeveQuqvAKUw=; b=gGDGO2v7KfTDOvd7JrtbcRfqlruBY1im57tANBrHHbXMdcYmfZ7DspsIb7bN760V10 tcZbTf6SVZSoAzXGOhoS/U+5n3DlE0cSWPXcFKKFqqtOHtmcnTiqMKh/TfLGOjqTtKdI IOMH0a4Pa8lRitAXW4lSkRvhZRSNmDzWZxx4K4VftoJuPGyFwyQLAU9cWRqqt6xFSxvL VxDOlHdJ7qAwlhnN+A42E3fIhj62VFR+tUP3545+zkShS9AQL1Akp3IIFyeZvrS3EnZJ 0rLlVxGZcGos9LKBHaz/0qiTzlHurULLCoeRWMgBBOI7GTZPuIbmX3bMiOGjLLY81EWy OAvw== X-Gm-Message-State: AODbwcBHemEInyd4mrxEhWH2diNi2VEzI0qTBJigVhmXgB01XulISnf0 9RiQIJMAvdXtGrdj X-Received: by 10.84.218.134 with SMTP id r6mr3655224pli.190.1495784324069; Fri, 26 May 2017 00:38:44 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id t3sm19106334pfl.60.2017.05.26.00.38.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 May 2017 00:38:43 -0700 (PDT) From: Guodong Xu To: mturquette@baylibre.com, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: chenjun14@huawei.com, zhongkaihua@huawei.com, zhangfei.gao@linaro.org, leo.yan@linaro.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zheng Shaobo Subject: [PATCH v2 3/3] clk: hi3660: Set PPLL2 to 2880M Date: Fri, 26 May 2017 15:38:21 +0800 Message-Id: <20170526073821.25971-4-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526073821.25971-1-guodong.xu@linaro.org> References: <20170526073821.25971-1-guodong.xu@linaro.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Zhong Kaihua Set PPLL2 to 2880M. With this patch, we saw better compatibility on various 1080p HDMI monitors. Signed-off-by: Zhong Kaihua Signed-off-by: Zheng Shaobo Acked-by: Zhangfei Gao --- drivers/clk/hisilicon/clk-hi3660.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index 67c4d44..eb9ba41 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -20,7 +20,7 @@ static const struct hisi_fixed_rate_clock hi3660_fixed_rate_clks[] = { { HI3660_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 128000000, }, { HI3660_CLK_PPLL0, "clk_ppll0", NULL, 0, 1600000000, }, { HI3660_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, }, - { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 960000000, }, + { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 2880000000, }, { HI3660_CLK_PPLL3, "clk_ppll3", NULL, 0, 1290000000, }, { HI3660_CLK_SCPLL, "clk_scpll", NULL, 0, 245760000, }, { HI3660_PCLK, "pclk", NULL, 0, 20000000, }, @@ -42,7 +42,7 @@ static const struct hisi_fixed_factor_clock hi3660_crg_fixed_factor_clks[] = { { HI3660_CLK_GATE_I2C6, "clk_gate_i2c6", "clk_i2c6_iomcu", 1, 4, 0, }, { HI3660_CLK_DIV_SYSBUS, "clk_div_sysbus", "clk_mux_sysbus", 1, 7, 0, }, { HI3660_CLK_DIV_320M, "clk_div_320m", "clk_320m_pll_gt", 1, 5, 0, }, - { HI3660_CLK_DIV_A53, "clk_div_a53hpm", "clk_a53hpm_andgt", 1, 2, 0, }, + { HI3660_CLK_DIV_A53, "clk_div_a53hpm", "clk_a53hpm_andgt", 1, 6, 0, }, { HI3660_CLK_GATE_SPI0, "clk_gate_spi0", "clk_ppll0", 1, 8, 0, }, { HI3660_CLK_GATE_SPI2, "clk_gate_spi2", "clk_ppll0", 1, 8, 0, }, { HI3660_PCIEPHY_REF, "clk_pciephy_ref", "clk_div_pciephy", 1, 1, 0, },