From patchwork Sat May 27 10:23:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 9751815 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 494946037E for ; Sat, 27 May 2017 10:26:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4DA292843B for ; Sat, 27 May 2017 10:26:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4285E2846A; Sat, 27 May 2017 10:26:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC31D2843B for ; Sat, 27 May 2017 10:26:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755527AbdE0KXr (ORCPT ); Sat, 27 May 2017 06:23:47 -0400 Received: from hermes.aosc.io ([199.195.250.187]:60495 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755525AbdE0KXo (ORCPT ); Sat, 27 May 2017 06:23:44 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 14C2050A53; Sat, 27 May 2017 10:23:39 +0000 (UTC) From: Icenowy Zheng To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , Linus Walleij Cc: linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Icenowy Zheng Subject: [PATCH v3 02/10] pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs Date: Sat, 27 May 2017 18:23:00 +0800 Message-Id: <20170527102308.1988-3-icenowy@aosc.io> In-Reply-To: <20170527102308.1988-1-icenowy@aosc.io> References: <20170527102308.1988-1-icenowy@aosc.io> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner A10, A20 and R40 SoCs have similar GPIO layout. Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support into A10 driver, and add R40 support into it. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Commit message change. drivers/pinctrl/sunxi/pinctrl-sunxi.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index a9d315a1256c..1bfc0d8a55df 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -87,6 +87,9 @@ #define PINCTRL_SUN5I_GR8 BIT(3) #define PINCTRL_SUN6I_A31 BIT(4) #define PINCTRL_SUN6I_A31S BIT(5) +#define PINCTRL_SUN4I_A10 BIT(6) +#define PINCTRL_SUN7I_A20 BIT(7) +#define PINCTRL_SUN8I_R40 BIT(8) struct sunxi_desc_function { unsigned long variant;