From patchwork Wed Jun 7 20:04:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 9772757 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A80B3603B4 for ; Wed, 7 Jun 2017 20:13:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 98E9D284EA for ; Wed, 7 Jun 2017 20:13:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8DBF72852A; Wed, 7 Jun 2017 20:13:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 138D32851F for ; Wed, 7 Jun 2017 20:13:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751504AbdFGUN5 (ORCPT ); Wed, 7 Jun 2017 16:13:57 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:57804 "EHLO outils.crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751428AbdFGUN4 (ORCPT ); Wed, 7 Jun 2017 16:13:56 -0400 From: Paul Cercueil To: Ralf Baechle , Michael Turquette , Stephen Boyd , Rob Herring Cc: Paul Burton , Maarten ter Huurne , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, linux-clk@vger.kernel.org, Paul Cercueil Subject: [PATCH 10/15] MIPS: ingenic: Add machine info for supported boards Date: Wed, 7 Jun 2017 22:04:34 +0200 Message-Id: <20170607200439.24450-11-paul@crapouillou.net> In-Reply-To: <20170607200439.24450-1-paul@crapouillou.net> References: <20170607200439.24450-1-paul@crapouillou.net> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This makes sure that 'mips_machtype' will be initialized to the SoC version used on the board. Signed-off-by: Paul Cercueil --- arch/mips/Kconfig | 1 + arch/mips/jz4740/Makefile | 2 +- arch/mips/jz4740/boards.c | 16 ++++++++++++++++ arch/mips/jz4740/setup.c | 34 +++++++++++++++++++++++++++++----- 4 files changed, 47 insertions(+), 6 deletions(-) create mode 100644 arch/mips/jz4740/boards.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2828ecde133d..f36ffb93efd9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -370,6 +370,7 @@ config MACH_INGENIC select BUILTIN_DTB select USE_OF select LIBFDT + select MIPS_MACHINE config LANTIQ bool "Lantiq based platforms" diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile index 39d70bde8cfe..87feb246fafe 100644 --- a/arch/mips/jz4740/Makefile +++ b/arch/mips/jz4740/Makefile @@ -5,7 +5,7 @@ # Object file lists. obj-y += prom.o time.o reset.o setup.o \ - platform.o timer.o + platform.o timer.o boards.o obj-$(CONFIG_MACH_JZ4740) += gpio.o diff --git a/arch/mips/jz4740/boards.c b/arch/mips/jz4740/boards.c new file mode 100644 index 000000000000..a3cf64cf004a --- /dev/null +++ b/arch/mips/jz4740/boards.c @@ -0,0 +1,16 @@ +/* + * Ingenic boards support + * + * Copyright 2017, Paul Cercueil + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or later + * as published by the Free Software Foundation. + */ + +#include +#include + +MIPS_MACHINE(MACH_INGENIC_JZ4740, "qi,lb60", "Qi Hardware Ben Nanonote", NULL); +MIPS_MACHINE(MACH_INGENIC_JZ4780, "img,ci20", + "Imagination Technologies CI20", NULL); diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c index 6d0152321819..afd84ee966e8 100644 --- a/arch/mips/jz4740/setup.c +++ b/arch/mips/jz4740/setup.c @@ -22,6 +22,7 @@ #include #include +#include #include #include @@ -53,16 +54,34 @@ static void __init jz4740_detect_mem(void) add_memory_region(0, size, BOOT_MEM_RAM); } +static unsigned long __init get_board_mach_type(const void *fdt) +{ + const struct mips_machine *mach; + + for (mach = (struct mips_machine *)&__mips_machines_start; + mach < (struct mips_machine *)&__mips_machines_end; + mach++) { + if (!fdt_node_check_compatible(fdt, 0, mach->mach_id)) + return mach->mach_type; + } + + return MACH_INGENIC_JZ4740; +} + void __init plat_mem_setup(void) { int offset; + if (!early_init_dt_scan(__dtb_start)) + return; + jz4740_reset_init(); - __dt_setup_arch(__dtb_start); offset = fdt_path_offset(__dtb_start, "/memory"); if (offset < 0) jz4740_detect_mem(); + + mips_machtype = get_board_mach_type(__dtb_start); } void __init device_tree_init(void) @@ -75,13 +94,18 @@ void __init device_tree_init(void) const char *get_system_type(void) { - if (IS_ENABLED(CONFIG_MACH_JZ4780)) - return "JZ4780"; - - return "JZ4740"; + return mips_get_machine_name(); } void __init arch_init_irq(void) { irqchip_init(); } + +static int __init jz4740_machine_setup(void) +{ + mips_machine_setup(); + + return 0; +} +arch_initcall(jz4740_machine_setup);