From patchwork Mon Jun 12 19:44:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 9782671 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 027C8602DA for ; Mon, 12 Jun 2017 19:44:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8D97284EE for ; Mon, 12 Jun 2017 19:44:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD69B286CB; Mon, 12 Jun 2017 19:44:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3746E286C8 for ; Mon, 12 Jun 2017 19:44:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752630AbdFLTow (ORCPT ); Mon, 12 Jun 2017 15:44:52 -0400 Received: from mail-wr0-f176.google.com ([209.85.128.176]:34318 "EHLO mail-wr0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752534AbdFLTov (ORCPT ); Mon, 12 Jun 2017 15:44:51 -0400 Received: by mail-wr0-f176.google.com with SMTP id g76so108156880wrd.1 for ; Mon, 12 Jun 2017 12:44:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=suQj/aMmdAUwxdtpTIFTI+yks41cWqooqXiUopEF+DE=; b=cAC3wrKEfkVUJ1hi6nWtkG0siZ0/z8A1AmmFFk0A7R0pqP/b7t8Dhmt8QbQZYvfuOA 4llS7Y+bJ0nEa5V7c723UYLFm1csj84yIxl+HPthoAjy2MntW9ins4H8equMHwHxEJ0g vs9AjV723t45FqQyTY7c8oZEHcxrKhOVGmghkRMdt2xhDI+vtnN239wiPnW2SxMxGNsN NCNuOTvRBACk9/tOzqux0M7qpFH+A1By1gJMa6KvIj/eGb48UHHVyrilocCjoazuYUq+ XKmkSfofbDFslwxLkEvm4HCkknIYKEONZZeB6Vxgrro63wgvZmnyKAEitO2lmrpqQ0Vp sr/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=suQj/aMmdAUwxdtpTIFTI+yks41cWqooqXiUopEF+DE=; b=r94WVZf+8SF7Qs69zBLsTRq/NFkDO+ybLvy98QOmeYltSuao+H/l/7EXRoImxJNQd+ sDO+zCkgR9XiAXn7+pm1ytBsFqVNm8LKhjc815uvLHEuhthpnLb2+9uUJTAvpGni05+O 1M9hC0i/3u5vKnsLrnjVFk++zt78CijGFWOqqMErLmR+iWV5MSkHGezHPx2y3Ww1SiR8 wDC0MyV+ykMwwPiWKLAEh5HlQV6B2wkk17RiTS6FUkpujfzjL6WX2fDjZVY6v+2NhN9U DUS3G8qfFt0D0o33igZvWdUVcmRPBG2GiYI5Xe0R68xoTFgv2XrF7K5bItPyHYF+MalL uS+Q== X-Gm-Message-State: AKS2vOxmrICQ+B267BuB68YHX9nC1mAS6gCJsg5z/ZK12q+klNTwk0F7 yNIJsoBj6vQuBVcC X-Received: by 10.223.139.211 with SMTP id w19mr375909wra.119.1497296688480; Mon, 12 Jun 2017 12:44:48 -0700 (PDT) Received: from localhost.localdomain (cag06-3-82-243-161-21.fbx.proxad.net. [82.243.161.21]) by smtp.googlemail.com with ESMTPSA id 70sm13250797wmu.28.2017.06.12.12.44.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Jun 2017 12:44:48 -0700 (PDT) From: Jerome Brunet To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org Cc: Jerome Brunet , Kevin Hilman , linux-amlogic@lists.infradead.org, Russell King , Linus Walleij , Boris Brezillon Subject: [PATCH v3 02/10] clk: add clk_core_set_phase_nolock function Date: Mon, 12 Jun 2017 21:44:30 +0200 Message-Id: <20170612194438.12298-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170612194438.12298-1-jbrunet@baylibre.com> References: <20170612194438.12298-1-jbrunet@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Create a core function for set_phase, as it is done for set_rate and set_parent. This rework is done to ease the integration of "protected" clock functionality. Signed-off-by: Jerome Brunet --- drivers/clk/clk.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index f5c371532509..dceaf0ff23db 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1873,6 +1873,23 @@ int clk_set_parent(struct clk *clk, struct clk *parent) } EXPORT_SYMBOL_GPL(clk_set_parent); +static int clk_core_set_phase_nolock(struct clk_core *core, int degrees) +{ + int ret = -EINVAL; + + if (!core) + return 0; + + trace_clk_set_phase(core, degrees); + + if (core->ops->set_phase) + ret = core->ops->set_phase(core->hw, degrees); + + trace_clk_set_phase_complete(core, degrees); + + return ret; +} + /** * clk_set_phase - adjust the phase shift of a clock signal * @clk: clock signal source @@ -1895,7 +1912,7 @@ EXPORT_SYMBOL_GPL(clk_set_parent); */ int clk_set_phase(struct clk *clk, int degrees) { - int ret = -EINVAL; + int ret; if (!clk) return 0; @@ -1906,17 +1923,7 @@ int clk_set_phase(struct clk *clk, int degrees) degrees += 360; clk_prepare_lock(); - - trace_clk_set_phase(clk->core, degrees); - - if (clk->core->ops->set_phase) - ret = clk->core->ops->set_phase(clk->core->hw, degrees); - - trace_clk_set_phase_complete(clk->core, degrees); - - if (!ret) - clk->core->phase = degrees; - + ret = clk_core_set_phase_nolock(clk->core, degrees); clk_prepare_unlock(); return ret;