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[85.224.11.45]) by smtp.gmail.com with ESMTPSA id y2sm1874056ljd.41.2017.06.18.14.56.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 18 Jun 2017 14:56:08 -0700 (PDT) From: Linus Walleij To: Michael Turquette , Stephen Boyd , Philipp Zabel , linux-clk@vger.kernel.org Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , Linus Walleij Subject: [PATCH 2/3 v6] clk: add DT bindings header for Gemini clock controller Date: Sun, 18 Jun 2017 23:55:49 +0200 Message-Id: <20170618215550.29216-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170618215550.29216-1-linus.walleij@linaro.org> References: <20170618215550.29216-1-linus.walleij@linaro.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the DT binding macros used by the clock controller. Acked-by: Rob Herring Signed-off-by: Linus Walleij --- Mike/Stephen: please merge this into the clock subsystem once you're happy with it. ChangeLog v5->v6: - No changes, resending to keep the series together. ChangeLog v4->v5: - No changes, resending to keep the series together. ChangeLog v1->v4: - New file to merge the macros in isolation from the DT bindings and implementation. The bindings themselves are merged through the ARM SoC tree. --- include/dt-bindings/clock/cortina,gemini-clock.h | 29 ++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/dt-bindings/clock/cortina,gemini-clock.h diff --git a/include/dt-bindings/clock/cortina,gemini-clock.h b/include/dt-bindings/clock/cortina,gemini-clock.h new file mode 100644 index 000000000000..acf5cd550b0c --- /dev/null +++ b/include/dt-bindings/clock/cortina,gemini-clock.h @@ -0,0 +1,29 @@ +#ifndef DT_BINDINGS_CORTINA_GEMINI_CLOCK_H +#define DT_BINDINGS_CORTINA_GEMINI_CLOCK_H + +/* RTC, AHB, APB, CPU, PCI, TVC, UART clocks and 13 gates */ +#define GEMINI_NUM_CLKS 20 + +#define GEMINI_CLK_RTC 0 +#define GEMINI_CLK_AHB 1 +#define GEMINI_CLK_APB 2 +#define GEMINI_CLK_CPU 3 +#define GEMINI_CLK_PCI 4 +#define GEMINI_CLK_TVC 5 +#define GEMINI_CLK_UART 6 +#define GEMINI_CLK_GATES 7 +#define GEMINI_CLK_GATE_SECURITY 7 +#define GEMINI_CLK_GATE_GMAC0 8 +#define GEMINI_CLK_GATE_GMAC1 9 +#define GEMINI_CLK_GATE_SATA0 10 +#define GEMINI_CLK_GATE_SATA1 11 +#define GEMINI_CLK_GATE_USB0 12 +#define GEMINI_CLK_GATE_USB1 13 +#define GEMINI_CLK_GATE_IDE 14 +#define GEMINI_CLK_GATE_PCI 15 +#define GEMINI_CLK_GATE_DDR 16 +#define GEMINI_CLK_GATE_FLASH 17 +#define GEMINI_CLK_GATE_TVC 18 +#define GEMINI_CLK_GATE_BOOT 19 + +#endif /* DT_BINDINGS_CORTINA_GEMINI_CLOCK_H */