| Message ID | 20170629060107.12548-1-joel@jms.id.au (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Stephen Boyd |
| Headers | show |
On Thu, Jun 29, 2017 at 8:01 AM, Joel Stanley <joel@jms.id.au> wrote: > The probe does a shift and mask of val without having read it from the hardware. > > Fixes: 846423f96721 ("clk: Add Gemini SoC clock controller") > Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Some oversight when splitting the driver in a OF init and probe path, thanks a lot for noticing! Magically the platform still worked fine. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 06/29, Joel Stanley wrote: > The probe does a shift and mask of val without having read it from the hardware. > > Fixes: 846423f96721 ("clk: Add Gemini SoC clock controller") > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- Applied to clk-next
diff --git a/drivers/clk/clk-gemini.c b/drivers/clk/clk-gemini.c index b82db96ce0c7..c391a49aaaff 100644 --- a/drivers/clk/clk-gemini.c +++ b/drivers/clk/clk-gemini.c @@ -306,6 +306,7 @@ static int gemini_clk_probe(struct platform_device *pdev) gemini_clk_data->hws[GEMINI_CLK_RTC] = hw; /* CPU clock derived as a fixed ratio from the AHB clock */ + regmap_read(map, GEMINI_GLOBAL_STATUS, &val); val >>= CPU_AHB_RATIO_SHIFT; val &= CPU_AHB_RATIO_MASK; hw = clk_hw_register_fixed_factor(NULL, "cpu", "ahb", 0,
The probe does a shift and mask of val without having read it from the hardware. Fixes: 846423f96721 ("clk: Add Gemini SoC clock controller") Signed-off-by: Joel Stanley <joel@jms.id.au> --- Compile tested only as I don't have access to the hardware. I noticed the bug while reading the driver. drivers/clk/clk-gemini.c | 1 + 1 file changed, 1 insertion(+)