From patchwork Tue Jul 11 10:56:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 9834495 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 37B5660325 for ; Tue, 11 Jul 2017 11:09:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29D6B28161 for ; Tue, 11 Jul 2017 11:09:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1EBD2283FB; Tue, 11 Jul 2017 11:09:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 903A728161 for ; Tue, 11 Jul 2017 11:09:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755415AbdGKLJg (ORCPT ); Tue, 11 Jul 2017 07:09:36 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:34733 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1754928AbdGKLJf (ORCPT ); Tue, 11 Jul 2017 07:09:35 -0400 Received: from ig2.spreadtrum.com (shcas01.spreadtrum.com [10.0.1.201]) by SHSQR01.spreadtrum.com with ESMTP id v6BB17NR059779 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=NO); Tue, 11 Jul 2017 19:01:07 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHCAS01.spreadtrum.com (10.0.1.201) by SHMBX03.spreadtrum.com (10.0.1.208) with Microsoft SMTP Server (TLS) id 15.0.847.32; Tue, 11 Jul 2017 19:01:07 +0800 Received: from localhost (10.0.73.143) by SHCAS01.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Tue, 11 Jul 2017 19:01:07 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: , , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , Orson Zhai , Chunyan Zhang , Chunyan Zhang Subject: [PATCH V2 10/10] arm64: dts: add clocks for SC9860 Date: Tue, 11 Jul 2017 18:56:27 +0800 Message-ID: <20170711105627.20526-11-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20170711105627.20526-1-chunyan.zhang@spreadtrum.com> References: <20170711105627.20526-1-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com v6BB17NR059779 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now we have clock driver, so add clock devicetree data for SC9860. Signed-off-by: Chunyan Zhang --- arch/arm64/boot/dts/sprd/sc9860.dtsi | 22 ++++++++++++++++++++++ arch/arm64/boot/dts/sprd/whale2.dtsi | 3 +-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi index 7b7d8ce..8d3f549 100644 --- a/arch/arm64/boot/dts/sprd/sc9860.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi @@ -7,6 +7,7 @@ */ #include +#include #include "whale2.dtsi" / { @@ -183,6 +184,27 @@ }; soc { + clk: clk { + compatible = "sprd,sc9860-clk"; + #clock-cells = <1>; + reg = <0 0x20000000 0 0x400>, + <0 0x20210000 0 0x3000>, + <0 0x402b0000 0 0x4000>, + <0 0x402d0000 0 0x400>, + <0 0x402e0000 0 0x4000>, + <0 0x40400000 0 0x400>, + <0 0x40880000 0 0x400>, + <0 0x415e0000 0 0x400>, + <0 0x60200000 0 0x400>, + <0 0x61000000 0 0x400>, + <0 0x61100000 0 0x3000>, + <0 0x62000000 0 0x4000>, + <0 0x62100000 0 0x4000>, + <0 0x63000000 0 0x400>, + <0 0x63100000 0 0x3000>, + <0 0x70b00000 0 0x3000>; + }; + funnel@10001000 { /* SoC Funnel */ compatible = "arm,coresight-funnel", "arm,primecell"; reg = <0 0x10001000 0 0x1000>; diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index 7c217c5..a4f376e 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -59,13 +59,12 @@ status = "disabled"; }; }; - }; ext_26m: ext-26m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; - clock-output-names = "ext_26m"; + clock-output-names = "ext-26m"; }; };