From patchwork Fri Sep 8 21:34:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9945077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 53E69604D4 for ; Fri, 8 Sep 2017 21:38:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45B1828919 for ; Fri, 8 Sep 2017 21:38:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3A9A728923; Fri, 8 Sep 2017 21:38:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 839B928919 for ; Fri, 8 Sep 2017 21:38:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757208AbdIHViF (ORCPT ); Fri, 8 Sep 2017 17:38:05 -0400 Received: from mail-lf0-f47.google.com ([209.85.215.47]:37078 "EHLO mail-lf0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757198AbdIHViD (ORCPT ); Fri, 8 Sep 2017 17:38:03 -0400 Received: by mail-lf0-f47.google.com with SMTP id 80so8182618lfy.4 for ; Fri, 08 Sep 2017 14:38:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:message-id:user-agent:date:to:to:to:cc:subject:mime-version :content-disposition; bh=KFY8znYU5nkKJQgQNGSpppx5aCCpEzGCrqcFWzKZ+wg=; b=SwUNgdTDzoF0ss1n9nUIYqbYDi31dUZ3QLom9Km+hPJ6/+r+uTqKkx8ftHwq2AJiLf aTvXwsDjAezv7hVIY+BZYqNqubJ+YFC1gV6iAAhtWUC9kXMULwB5/ad1tQ6pfIn2Uwto ZkgjgIc2yKR4f5sNWfihoKs4h3iqWv68ZGnJ34MI41TNTdLhYFrMHtkSEDn9A88t74Il XefK6TnS4DjUZUQx+WgVS4+03QUbaVvjZyBCzpApVhrGTVbb4ewZRg+Aq7jqwsN4cd2e 9Li9vwkQn5aVAB06fXRB1onF6QA9pMSyQihGM5DMHc/IyGv/VECRqz9W0KGir+Wvpp9l sUVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:message-id:user-agent:date:to:to:to:cc :subject:mime-version:content-disposition; bh=KFY8znYU5nkKJQgQNGSpppx5aCCpEzGCrqcFWzKZ+wg=; b=QfjRaZMq5fxn/spZW92pE5dBX/NJK/GgTyRevzQK9fZdFfDfjw2VTS4tOS4iWKQsKa 6R7rGScvlTvVmSYrGU5dly7smFRPsSWAJwfrYS+FJnzwxoVPtRqp9tN99TnAXdyV6k8i IBVgjPhvuKyP2yqqE9yGLpBjNQY+BiLBQuWpcC52Zy0hiKTR082W2lliwj2GvD14EBQi zFkJjT+nwck3oPmC2oHazsCUq1ckagmvuZjhaX5SjQMVchM14BTEGsHxrpYsQEqX8PRC 0BWACYv7MShip5ksFucGJkYB1ZZicI9cod33i8oEacZudii8sVTpfleJgg35xJjGEBvJ qQRg== X-Gm-Message-State: AHPjjUi/fY6THp7oF15opjBtjuW6I11n1ozw3N1SaDOHzuQQ42EoYOae 7ykDOHrgZqiL0lJj X-Google-Smtp-Source: AOwi7QDDft9qJqvAUNcgNbKUvXvlLduoxhZHto7oQWgZm6eLaArk3a0+gE+MM5qvxuIEIuykmE27iQ== X-Received: by 10.25.143.205 with SMTP id s74mr1658362lfk.236.1504906681906; Fri, 08 Sep 2017 14:38:01 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.86.28]) by smtp.gmail.com with ESMTPSA id x26sm497656ljd.88.2017.09.08.14.37.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Sep 2017 14:38:01 -0700 (PDT) From: Sergei Shtylyov X-Google-Original-From: "Sergei Shtylyov" Received: by wasted.cogentembedded.com (sSMTP sendmail emulation); Sat, 09 Sep 2017 00:37:58 +0300 Message-Id: <20170908213758.670316956@cogentembedded.com> User-Agent: quilt/0.64 Date: Sat, 09 Sep 2017 00:34:19 +0300 To: Michael Turquette , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Geert Uytterhoeven To: Stephen Boyd To: linux-clk@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Simon Horman , Vladimir Barinov , Sergei Shtylyov Subject: [PATCH v2 1/2] dt-bindings: clock: add R8A77970 CPG core clock definitions MIME-Version: 1.0 Content-Disposition: inline; filename=dt-bindings-clock-add-R8A77970-CPG-core-clock-definitions-v2.patch Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by the device tree sources to reference the R8A77970 CPG core clocks by index. The data come from the table 8.2c of R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.55, Jun. 30, 2017). Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changed in version 2: - changed R8A7797 to R8A77970 everywhere; - removed the CSIREF clock (renumbering the clocks that followed it); - added the R-Car gen3 manual reference to the patch description; - added Geert's tag; - added Cogent Embedded's copyright; - renamed the patch. include/dt-bindings/clock/r8a77970-cpg-mssr.h | 48 ++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux/include/dt-bindings/clock/r8a77970-cpg-mssr.h =================================================================== --- /dev/null +++ linux/include/dt-bindings/clock/r8a77970-cpg-mssr.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ + +#include + +/* r8a77970 CPG Core Clocks */ +#define R8A77970_CLK_Z2 0 +#define R8A77970_CLK_ZR 1 +#define R8A77970_CLK_ZTR 2 +#define R8A77970_CLK_ZTRD2 3 +#define R8A77970_CLK_ZT 4 +#define R8A77970_CLK_ZX 5 +#define R8A77970_CLK_S1D1 6 +#define R8A77970_CLK_S1D2 7 +#define R8A77970_CLK_S1D4 8 +#define R8A77970_CLK_S2D1 9 +#define R8A77970_CLK_S2D2 10 +#define R8A77970_CLK_S2D4 11 +#define R8A77970_CLK_LB 12 +#define R8A77970_CLK_CL 13 +#define R8A77970_CLK_ZB3 14 +#define R8A77970_CLK_ZB3D2 15 +#define R8A77970_CLK_DDR 16 +#define R8A77970_CLK_CR 17 +#define R8A77970_CLK_CRD2 18 +#define R8A77970_CLK_SD0H 19 +#define R8A77970_CLK_SD0 20 +#define R8A77970_CLK_RPC 21 +#define R8A77970_CLK_RPCD2 22 +#define R8A77970_CLK_MSO 23 +#define R8A77970_CLK_CANFD 24 +#define R8A77970_CLK_CSI0 25 +#define R8A77970_CLK_FRAY 26 +#define R8A77970_CLK_CP 27 +#define R8A77970_CLK_CPEX 28 +#define R8A77970_CLK_R 29 +#define R8A77970_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */