From patchwork Thu Nov 2 06:56:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10038047 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8715B603B5 for ; Thu, 2 Nov 2017 07:07:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A61528DFC for ; Thu, 2 Nov 2017 07:07:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6DF9228E03; Thu, 2 Nov 2017 07:07:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64CC528DFC for ; Thu, 2 Nov 2017 07:07:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754817AbdKBHHW (ORCPT ); Thu, 2 Nov 2017 03:07:22 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:23387 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1751587AbdKBHHW (ORCPT ); Thu, 2 Nov 2017 03:07:22 -0400 Received: from ig2.spreadtrum.com (shmbx01.spreadtrum.com [10.0.1.203]) by SHSQR01.spreadtrum.com with ESMTP id vA27230W014271 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 2 Nov 2017 15:02:03 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX01.spreadtrum.com (10.0.1.203) with Microsoft SMTP Server (TLS) id 15.0.847.32; Thu, 2 Nov 2017 15:02:05 +0800 Received: from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Thu, 2 Nov 2017 15:01:47 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: Catalin Marinas , Will Deacon , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , , , Orson Zhai , Chunyan Zhang Subject: [PATCH V3 01/11] drivers: move clock common macros out from vendor directories Date: Thu, 2 Nov 2017 14:56:16 +0800 Message-ID: <20171102065626.21835-2-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20171102065626.21835-1-chunyan.zhang@spreadtrum.com> References: <20171102065626.21835-1-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com vA27230W014271 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These macros are used by more than one SoC vendor platforms, avoid to have many copies of these code, this patch moves them to the common clock directory which every clock drivers can access to. Signed-off-by: Chunyan Zhang --- drivers/clk/clk_common.h | 60 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 drivers/clk/clk_common.h diff --git a/drivers/clk/clk_common.h b/drivers/clk/clk_common.h new file mode 100644 index 0000000..21e93d2 --- /dev/null +++ b/drivers/clk/clk_common.h @@ -0,0 +1,60 @@ +/* + * drivers/clk/clk_common.h + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _CLK_COMMON_H_ +#define _CLK_COMMON_H_ + +#include + +#define CLK_HW_INIT(_name, _parent, _ops, _flags) \ + (&(struct clk_init_data) { \ + .flags = _flags, \ + .name = _name, \ + .parent_names = (const char *[]) { _parent }, \ + .num_parents = 1, \ + .ops = _ops, \ + }) + +#define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \ + (&(struct clk_init_data) { \ + .flags = _flags, \ + .name = _name, \ + .parent_names = _parents, \ + .num_parents = ARRAY_SIZE(_parents), \ + .ops = _ops, \ + }) + +#define CLK_HW_INIT_NO_PARENT(_name, _ops, _flags) \ + (&(struct clk_init_data) { \ + .flags = _flags, \ + .name = _name, \ + .parent_names = NULL, \ + .num_parents = 0, \ + .ops = _ops, \ + }) + +#define CLK_FIXED_FACTOR(_struct, _name, _parent, \ + _div, _mult, _flags) \ + struct clk_fixed_factor _struct = { \ + .div = _div, \ + .mult = _mult, \ + .hw.init = CLK_HW_INIT(_name, \ + _parent, \ + &clk_fixed_factor_ops, \ + _flags), \ + } + +#define CLK_FIXED_RATE(_struct, _name, _flags, \ + _fixed_rate, _fixed_accuracy) \ + struct clk_fixed_rate _struct = { \ + .fixed_rate = _fixed_rate, \ + .fixed_accuracy = _fixed_accuracy, \ + .hw.init = CLK_HW_INIT_NO_PARENT(_name, \ + &clk_fixed_rate_ops, \ + _flags), \ + } + +#endif /* _CLK_COMMON_H_ */