From patchwork Thu Dec 7 12:57:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10099077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 757E760325 for ; Thu, 7 Dec 2017 13:43:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62F2A28346 for ; Thu, 7 Dec 2017 13:43:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 57A0429F9C; Thu, 7 Dec 2017 13:43:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAF8B28346 for ; Thu, 7 Dec 2017 13:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754285AbdLGNnO (ORCPT ); Thu, 7 Dec 2017 08:43:14 -0500 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:29067 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1754896AbdLGNJR (ORCPT ); Thu, 7 Dec 2017 08:09:17 -0500 Received: from ig2.spreadtrum.com (shmbx03.spreadtrum.com [10.0.1.208]) by SHSQR01.spreadtrum.com with ESMTP id vB7D35a1069566 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 7 Dec 2017 21:03:05 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX03.spreadtrum.com (10.0.1.208) with Microsoft SMTP Server (TLS) id 15.0.847.32; Thu, 7 Dec 2017 21:04:00 +0800 Received: from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Thu, 7 Dec 2017 21:04:00 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: Catalin Marinas , Will Deacon , , , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , Orson Zhai , Chunyan Zhang Subject: [PATCH V7 11/12] arm64: dts: add syscon for whale2 platform Date: Thu, 7 Dec 2017 20:57:14 +0800 Message-ID: <20171207125715.16160-12-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20171207125715.16160-1-chunyan.zhang@spreadtrum.com> References: <20171207125715.16160-1-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com vB7D35a1069566 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some clocks on SC9860 are in the same address area with syscon devices, the proper syscon node will be quoted under the definitions of those clocks in DT. Signed-off-by: Chunyan Zhang --- arch/arm64/boot/dts/sprd/whale2.dtsi | 46 +++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index 7c217c5..6ea3a75 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -17,6 +17,51 @@ #size-cells = <2>; ranges; + ap_ahb_regs: syscon@20210000 { + compatible = "syscon"; + reg = <0 0x20210000 0 0x10000>; + }; + + pmu_regs: syscon@402b0000 { + compatible = "syscon"; + reg = <0 0x402b0000 0 0x10000>; + }; + + aon_regs: syscon@402e0000 { + compatible = "syscon"; + reg = <0 0x402e0000 0 0x10000>; + }; + + ana_regs: syscon@40400000 { + compatible = "syscon"; + reg = <0 0x40400000 0 0x10000>; + }; + + agcp_regs: syscon@415e0000 { + compatible = "syscon"; + reg = <0 0x415e0000 0 0x1000000>; + }; + + vsp_regs: syscon@61100000 { + compatible = "syscon"; + reg = <0 0x61100000 0 0x10000>; + }; + + cam_regs: syscon@62100000 { + compatible = "syscon"; + reg = <0 0x62100000 0 0x10000>; + }; + + disp_regs: syscon@63100000 { + compatible = "syscon"; + reg = <0 0x63100000 0 0x10000>; + }; + + ap_apb_regs: syscon@70b00000 { + compatible = "syscon"; + reg = <0 0x70b00000 0 0x40000>; + }; + ap-apb { compatible = "simple-bus"; #address-cells = <1>; @@ -59,7 +104,6 @@ status = "disabled"; }; }; - }; ext_26m: ext-26m {