From patchwork Fri Apr 27 00:17:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 10367147 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4FBB0601D3 for ; Fri, 27 Apr 2018 00:24:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40CE4292AA for ; Fri, 27 Apr 2018 00:24:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 343E1292AF; Fri, 27 Apr 2018 00:24:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C6F4292AA for ; Fri, 27 Apr 2018 00:24:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757238AbeD0ASk (ORCPT ); Thu, 26 Apr 2018 20:18:40 -0400 Received: from vern.gendns.com ([206.190.152.46]:46290 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757164AbeD0ASi (ORCPT ); Thu, 26 Apr 2018 20:18:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=kH5FsjURdexYJZ6AhH2jYlfE/3PR2PtQRi2kG7y+/jc=; b=q+QFIRnAEMt1DNo47sYAbqZKc NObPWfuUiDe4eB+S+fxCfY2wK4X0+gClpRIg/287Z5D6I+tn26/5dgz5uL7yBAE+y6puDgE5eHwwb 7DBcaMnnrzM8HiurTI84+5URHMCp1HTcaRWifCgvx/Ly1UIlEMXfibTfVWX+BRDVSmJG1xqrrp9in OHjuaw97S6xLhlC9WBQvtIPbWkQ4v/i04Fa1GbK8AML3GfesOZ22hOJnqwzoba+DI/HACZjrTcktx +Fxw7gVdiz6iWbML0uDckortZb37VBKaEHBwUKzFK2lXd/jUoPPZbg3RDOfQo/p3wmN86I7eQBpQW wEvjJwNPQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:39016 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fBr5w-000iph-Lt; Thu, 26 Apr 2018 20:18:36 -0400 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v9 10/27] ARM: davinci: dm646x: add new clock init using common clock framework Date: Thu, 26 Apr 2018 19:17:28 -0500 Message-Id: <20180427001745.4116-11-david@lechnology.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427001745.4116-1-david@lechnology.com> References: <20180427001745.4116-1-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the new board-specific clock init in mach-davinci/dm646x.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner --- v9 changes: - register PLL1 and PSC in dm646x_init_time() instead of as platform device so that we get the correct timer0 clock for davinci_timer_init() - Fixed size of PLL memory block v8 changes: - register clkdev lookup for ref_clk and aux_clkin v7 changes: - add clock platform device declarations - register platform devices instead of registering clocks directly - add davinci prefix to commit description v6 changes: - add blank lines between function calls arch/arm/mach-davinci/board-dm646x-evm.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm646x.c | 63 +++++++++++++++++++++--- 3 files changed, 58 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 2d37f5b0e1f5..d672804df817 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -772,6 +772,8 @@ static __init void evm_init(void) int ret; struct davinci_soc_info *soc_info = &davinci_soc_info; + dm646x_register_clocks(); + ret = dm646x_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 16aca5853ab2..fa99197d36f9 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -116,6 +116,7 @@ int dm644x_gpio_register(void); /* DM646x function declarations */ void dm646x_init(void); void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate); +void dm646x_register_clocks(void); void dm646x_init_mcasp0(struct snd_platform_data *pdata); void dm646x_init_mcasp1(struct snd_platform_data *pdata); int dm646x_init_edma(struct edma_rsv_info *rsv); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index e1d6e92f434a..d260ca5f6827 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -8,29 +8,35 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ + +#include +#include +#include #include #include #include -#include -#include -#include #include #include +#include +#include #include +#include #include #include -#include "psc.h" #include -#include #include -#include +#include +#include "asp.h" #include "davinci.h" -#include "clock.h" #include "mux.h" -#include "asp.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif #define DAVINCI_VPIF_BASE (0x01C12000) @@ -46,6 +52,7 @@ #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -356,6 +363,7 @@ static struct clk_lookup dm646x_clks[] = { CLK(NULL, "vpif1", &vpif1_clk), CLK(NULL, NULL, NULL), }; +#endif static struct emac_platform_data dm646x_emac_pdata = { .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET, @@ -953,10 +961,49 @@ void __init dm646x_init(void) void __init dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll1, *psc; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate); + clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate); + + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); + dm355_pll1_init(NULL, pll1, NULL); + + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); + dm355_psc_init(NULL, psc); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else ref_clk.rate = ref_clk_rate; aux_clkin.rate = aux_clkin_rate; davinci_clk_init(dm646x_clks); davinci_timer_init(&timer0_clk); +#endif +} + +static struct resource dm646x_pll2_resources[] = { + { + .start = DAVINCI_PLL2_BASE, + .end = DAVINCI_PLL2_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm646x_pll2_device = { + .name = "dm646x-pll2", + .id = -1, + .resource = dm646x_pll2_resources, + .num_resources = ARRAY_SIZE(dm646x_pll2_resources), +}; + +void __init dm646x_register_clocks(void) +{ + /* PLL1 and PSC are registered in dm646x_init_time() */ + platform_device_register(&dm646x_pll2_device); } static int __init dm646x_init_devices(void)