From patchwork Fri Apr 27 00:17:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 10367055 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9E183601D3 for ; Fri, 27 Apr 2018 00:18:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9222E2892E for ; Fri, 27 Apr 2018 00:18:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 862FD2905D; Fri, 27 Apr 2018 00:18:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CA7FF2892E for ; Fri, 27 Apr 2018 00:18:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757208AbeD0ASf (ORCPT ); Thu, 26 Apr 2018 20:18:35 -0400 Received: from vern.gendns.com ([206.190.152.46]:46254 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757164AbeD0ASc (ORCPT ); Thu, 26 Apr 2018 20:18:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=1XMmDvbb7LqAuyCcvGDNIU4LjCqTKCdQEQv4izE+6eU=; b=0CTDTlb5Azma26WUlRxycgUOH jcU2oKmV1pdD8M3imX5YSMqNEOiNspss4VSvExmXAqQpcec1UCnSL2EY2cwi8YQvqu1YnJ7Dk6oPl LunvpwM6xHL/GDxUXUGFEBL8Jmzoe1b9JtmCdG9Woxz2tXeg1VRkbQScsjOgyRO0Lb2JDpXSLpYG4 PndFAvkj+orwzEMvsqqFtzUGFEvfuF6vKiIKJvvGuPrjB4deGOeQyFyr7AVunhcl30xp3IwOBw2pJ GauShMZ+foPk2NfvhO2NDV4w3nXpOxqUb2sXa2KTRelyppuTXOnWRvzV2jDzxPArZ92NDxKS//vL0 xpAcvbbkA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:39016 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fBr5q-000iph-NJ; Thu, 26 Apr 2018 20:18:30 -0400 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v9 06/27] ARM: davinci: da850: add new clock init using common clock framework Date: Thu, 26 Apr 2018 19:17:24 -0500 Message-Id: <20180427001745.4116-7-david@lechnology.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427001745.4116-1-david@lechnology.com> References: <20180427001745.4116-1-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the new board-specific clock init in mach-davinci/da850.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Some CFGCHIP macros were removed because we are now including linux/mfd/da8xx-cfgchip.h which defines the same values. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v9 changes: - register PLL in da850_init_time() instead of as platform device so that we get the correct timer0 clock for davinci_timer_init() v8 changes: - add platform data for PLL clocks v7 changes: - add clock platform device declarations - register platform devices instead of registering clocks directly - clkdev lookup is moved to drivers/clk - add davinci prefix to commit description v6 changes: - add blank lines between function calls - include da8xx_register_cfgchip() - add async1 and async2 clock domains arch/arm/mach-davinci/board-da850-evm.c | 2 + arch/arm/mach-davinci/board-mityomapl138.c | 2 + arch/arm/mach-davinci/board-omapl138-hawk.c | 2 + arch/arm/mach-davinci/da850.c | 155 ++++++++++++++++++-- arch/arm/mach-davinci/da8xx-dt.c | 2 + arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 6 files changed, 151 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 3063478bcc36..78a670aafea0 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1334,6 +1334,8 @@ static __init void da850_evm_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index d1c85484c2e2..f442784eded3 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -502,6 +502,8 @@ static void __init mityomapl138_init(void) { int ret; + da850_register_clocks(); + /* for now, no special EDMA channels are reserved */ ret = da850_register_edma(NULL); if (ret) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 0d32042b728f..eb09e333b6cd 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -281,6 +281,8 @@ static __init void omapl138_hawk_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 1dbf01c4124b..9e00beb943c9 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -11,39 +11,45 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ + +#include +#include #include +#include #include #include -#include +#include +#include +#include +#include #include -#include +#include #include -#include #include -#include "psc.h" -#include -#include #include -#include -#include #include +#include +#include +#include #include +#include -#include "clock.h" #include "mux.h" +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif + #define DA850_PLL1_BASE 0x01e1a000 #define DA850_TIMER64P2_BASE 0x01f0c000 #define DA850_TIMER64P3_BASE 0x01f0d000 #define DA850_REF_FREQ 24000000 -#define CFGCHIP3_ASYNC3_CLKSRC BIT(4) -#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5) -#define CFGCHIP0_PLL_MASTER_LOCK BIT(4) - +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate); static int da850_round_armrate(struct clk *clk, unsigned long rate); static int da850_set_pll0rate(struct clk *clk, unsigned long armrate); @@ -583,6 +589,7 @@ static struct clk_lookup da850_clks[] = { CLK("ecap.2", "fck", &ecap2_clk), CLK(NULL, NULL, NULL), }; +#endif /* * Device specific mux setup @@ -1170,6 +1177,7 @@ int da850_register_cpufreq(char *async_clk) return platform_device_register(&da850_cpufreq_device); } +#ifndef CONFIG_COMMON_CLK static int da850_round_armrate(struct clk *clk, unsigned long rate) { int ret = 0, diff; @@ -1232,12 +1240,14 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long rate) return 0; } +#endif /* CONFIG_COMMON_CLK */ #else int __init da850_register_cpufreq(char *async_clk) { return 0; } +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate) { return -EINVAL; @@ -1252,6 +1262,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) { return clk->rate; } +#endif /* CONFIG_COMMON_CLK */ #endif /* VPIF resource, platform data */ @@ -1395,6 +1406,124 @@ void __init da850_init(void) void __init da850_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll0; + struct regmap *cfgchip; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ); + + pll0 = ioremap(DA8XX_PLL0_BASE, SZ_4K); + cfgchip = da8xx_get_cfgchip(); + + da850_pll0_init(NULL, pll0, cfgchip); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(da850_clks); davinci_timer_init(&timerp64_0_clk); +#endif +} + +static struct resource da850_pll1_resources[] = { + { + .start = DA850_PLL1_BASE, + .end = DA850_PLL1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct davinci_pll_platform_data da850_pll1_pdata; + +static struct platform_device da850_pll1_device = { + .name = "da850-pll1", + .id = -1, + .resource = da850_pll1_resources, + .num_resources = ARRAY_SIZE(da850_pll1_resources), + .dev = { + .platform_data = &da850_pll1_pdata, + }, +}; + +static struct resource da850_psc0_resources[] = { + { + .start = DA8XX_PSC0_BASE, + .end = DA8XX_PSC0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc0_device = { + .name = "da850-psc0", + .id = -1, + .resource = da850_psc0_resources, + .num_resources = ARRAY_SIZE(da850_psc0_resources), +}; + +static struct resource da850_psc1_resources[] = { + { + .start = DA8XX_PSC1_BASE, + .end = DA8XX_PSC1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc1_device = { + .name = "da850-psc1", + .id = -1, + .resource = da850_psc1_resources, + .num_resources = ARRAY_SIZE(da850_psc1_resources), +}; + +static struct da8xx_cfgchip_clk_platform_data da850_async1_pdata; + +static struct platform_device da850_async1_clksrc_device = { + .name = "da850-async1-clksrc", + .id = -1, + .dev = { + .platform_data = &da850_async1_pdata, + }, +}; + +static struct da8xx_cfgchip_clk_platform_data da850_async3_pdata; + +static struct platform_device da850_async3_clksrc_device = { + .name = "da850-async3-clksrc", + .id = -1, + .dev = { + .platform_data = &da850_async3_pdata, + }, +}; + +static struct da8xx_cfgchip_clk_platform_data da850_tbclksync_pdata; + +static struct platform_device da850_tbclksync_device = { + .name = "da830-tbclksync", + .id = -1, + .dev = { + .platform_data = &da850_tbclksync_pdata, + }, +}; + +void __init da850_register_clocks(void) +{ + /* PLL0 is registered in da850_init_time() */ + + da850_pll1_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_pll1_device); + + da850_async1_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_async1_clksrc_device); + + da850_async3_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_async3_clksrc_device); + + platform_device_register(&da850_psc0_device); + + platform_device_register(&da850_psc1_device); + + da850_tbclksync_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_tbclksync_device); } diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index ab199f4b9ce4..91dd9cb6d113 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -67,6 +67,8 @@ static void __init da850_init_machine(void) int ret; + da850_register_clocks(); + ret = da8xx_register_usb20_phy_clk(false); if (ret) pr_warn("%s: registering USB 2.0 PHY clock failed: %d", diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 64861ac6a9d4..612e45437cec 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -93,6 +93,7 @@ void da830_register_clocks(void); void da850_init(void); void da850_init_time(void); +void da850_register_clocks(void); int da830_register_edma(struct edma_rsv_info *rsv); int da850_register_edma(struct edma_rsv_info *rsv[2]);