[4.17,032/220] clk: renesas: cpg-mssr: Stop using printk format %pCr

Commit Message

Greg Kroah-Hartman July 1, 2018, 4:20 p.m. UTC

4.17-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Geert Uytterhoeven <[e-mail]>

commit ef4b0be62641d296cf4c0ad8f75ab83ab066ed51 upstream.

Printk format "%pCr" will be removed soon, as clk_get_rate() must not be
called in atomic context.

Replace it by open-coding the operation.  This is safe here, as the code
runs in task context.

Link: http://lkml.kernel.org/r/[e-mail]
To: Jia-Ju Bai <[e-mail]>
To: Jonathan Corbet <[e-mail]>
To: Michael Turquette <[e-mail]>
To: Stephen Boyd <[e-mail]>
To: Zhang Rui <[e-mail]>
To: Eduardo Valentin <[e-mail]>
To: Eric Anholt <[e-mail]>
To: Stefan Wahren <[e-mail]>
To: Greg Kroah-Hartman <[e-mail]>
Cc: Sergey Senozhatsky <[e-mail]>
Cc: Petr Mladek <[e-mail]>
Cc: Linus Torvalds <[e-mail]>
Cc: Steven Rostedt <[e-mail]>
Cc: [e-mail]
Cc: [e-mail]
Cc: [e-mail]
Cc: [e-mail]
Cc: [e-mail]
Cc: [e-mail]
Cc: [e-mail]
Cc: Geert Uytterhoeven <[e-mail]>
Cc: [e-mail] # 4.5+
Signed-off-by: Geert Uytterhoeven <[e-mail]>
Acked-by: Stephen Boyd <[e-mail]>
Signed-off-by: Petr Mladek <[e-mail]>
Signed-off-by: Greg Kroah-Hartman <[e-mail]>

---
 drivers/clk/renesas/renesas-cpg-mssr.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)



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Patch

--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -258,8 +258,9 @@  struct clk *cpg_mssr_clk_src_twocell_get
 		dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,
 		       PTR_ERR(clk));
 	else
-		dev_dbg(dev, "clock (%u, %u) is %pC at %pCr Hz\n",
-			clkspec->args[0], clkspec->args[1], clk, clk);
+		dev_dbg(dev, "clock (%u, %u) is %pC at %lu Hz\n",
+			clkspec->args[0], clkspec->args[1], clk,
+			clk_get_rate(clk));
 	return clk;
 }
 
@@ -326,7 +327,7 @@  static void __init cpg_mssr_register_cor
 	if (IS_ERR_OR_NULL(clk))
 		goto fail;
 
-	dev_dbg(dev, "Core clock %pC at %pCr Hz\n", clk, clk);
+	dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
 	priv->clks[id] = clk;
 	return;
 
@@ -392,7 +393,7 @@  static void __init cpg_mssr_register_mod
 	if (IS_ERR(clk))
 		goto fail;
 
-	dev_dbg(dev, "Module clock %pC at %pCr Hz\n", clk, clk);
+	dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
 	priv->clks[id] = clk;
 	priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32);
 	return;