From patchwork Wed Oct 10 14:24:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10634651 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 29B6A679F for ; Wed, 10 Oct 2018 14:26:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1A22B2A36B for ; Wed, 10 Oct 2018 14:26:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0E24A2A3F5; Wed, 10 Oct 2018 14:26:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B4FBB2A36B for ; Wed, 10 Oct 2018 14:26:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727033AbeJJVrs (ORCPT ); Wed, 10 Oct 2018 17:47:48 -0400 Received: from shell.v3.sk ([90.176.6.54]:53457 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726649AbeJJVrs (ORCPT ); Wed, 10 Oct 2018 17:47:48 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id D87F5BCF70; Wed, 10 Oct 2018 16:25:20 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id qQBA9q_2mvtx; Wed, 10 Oct 2018 16:25:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 43F3EBCEFC; Wed, 10 Oct 2018 16:25:10 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id J3wt5QcidaZa; Wed, 10 Oct 2018 16:25:09 +0200 (CEST) Received: from belphegor.lan (ip-89-102-31-34.net.upcbroadband.cz [89.102.31.34]) by zimbra.v3.sk (Postfix) with ESMTPSA id F1D09BCF5E; Wed, 10 Oct 2018 16:25:08 +0200 (CEST) From: Lubomir Rintel To: Dmitry Torokhov Cc: Michael Turquette , Rob Herring , Mark Rutland , Stephen Boyd , James Cameron , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 1/8] dt-bindings: olpc,ap-sp: add clock Date: Wed, 10 Oct 2018 16:24:57 +0200 Message-Id: <20181010142504.233467-2-lkundrak@v3.sk> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181010142504.233467-1-lkundrak@v3.sk> References: <20181010142504.233467-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The clock is necessary for the device operation, hence it's required. Its name, "sp", stands for "Security Processor". It is one of several names that are used for the processor that serves as the keyboard controller on an OLPC and is consistent with the node name. Reviewed-by: Rob Herring Signed-off-by: Lubomir Rintel Acked-by: Pavel Machek --- Documentation/devicetree/bindings/serio/olpc,ap-sp.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/serio/olpc,ap-sp.txt b/Documentation/devicetree/bindings/serio/olpc,ap-sp.txt index 0e72183f52bc..36603419d6f8 100644 --- a/Documentation/devicetree/bindings/serio/olpc,ap-sp.txt +++ b/Documentation/devicetree/bindings/serio/olpc,ap-sp.txt @@ -4,10 +4,14 @@ Required properties: - compatible : "olpc,ap-sp" - reg : base address and length of SoC's WTM registers - interrupts : SP-AP interrupt +- clocks : phandle + clock-specifier for the clock that drives the WTM +- clock-names: should be "sp" Example: ap-sp@d4290000 { compatible = "olpc,ap-sp"; reg = <0xd4290000 0x1000>; interrupts = <40>; + clocks = <&soc_clocks MMP2_CLK_SP>; + clock-names = "sp"; }