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Tue, 4 Dec 2018 16:53:16 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v3 3/5] dt-bindings: clk: exynos5433: document imem clock Date: Tue, 4 Dec 2018 17:52:46 +0100 Message-Id: <20181204165248.17572-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOKsWRmVeSWpSXmKPExsWy7djP87p/N7DFGBw8YmixccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWd1 4PFYM28No8emVZ1sHgff7WHy6NuyitHj8ya5ANYoLpuU1JzMstQifbsEroyPvYfZChYLVNxs nsrcwLiet4uRk0NCwERi+d+bbF2MXBxCAisYJZae3csCkhAS+MIo8fmiJETiM6PE/ZlnWWE6 7rxZwghRtJxRYsdsqCKghmtf+sG62QTMJR5tP8MEYosIuEn0TZ4NtoJZoI1Z4unsLrCEsICn xLUZF9lBbBYBVYm/p66BTeUVcJE4sWwnM8Q2eYmGXZvBajgFXCU2TfgHVSMocXLmE7BlzEA1 zVtnM4MskBDYxC6xbdknqGYXib6ld1ggbGGJV8e3sEPYMhL/d85ngrDLJXZvfcYO0dzCKDF3 8iKohLXE4eMXgX7mANqgKbF+lz5E2FFi5rouZpCwhACfxI23ghA38ElM2jYdKswr0dEmBFGt KzHv/xlowElLdP1fB2V7SLzdvottAqPiLCTfzELyzSyEvQsYmVcxiqeWFuempxYb56WW6xUn 5haX5qXrJefnbmIEJqfT/45/3cG470/SIUYBDkYlHl6JKWwxQqyJZcWVuYcYJTiYlUR476gB hXhTEiurUovy44tKc1KLDzFKc7AoifNWMzyIFhJITyxJzU5NLUgtgskycXBKNTCq+hZefng4 5PyjsgmPHjvs6IvavbpUPG1LB6NZD6OL8gaNqX+52lcEsf5i8b8tIcqS8kLl18KFZ9Q7uUJ3 XC+fdtD982TfqA/bWPNm+vQ/cMyY+Tig27W0QC5N7uaJmbefhj3e0Wutm5MTI7I2fm/evCbp B5mf1bwOy8xrenRCzZi3fvYHDUklluKMREMt5qLiRAAF5ukqSgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xu7p/NrDFGCxtMrDYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFofftLM6 8HismbeG0WPTqk42j4Pv9jB59G1ZxejxeZNcAGuUnk1RfmlJqkJGfnGJrVK0oYWRnqGlhZ6R iaWeobF5rJWRqZK+nU1Kak5mWWqRvl2CXsbH3sNsBYsFKm42T2VuYFzP28XIySEhYCJx580S xi5GLg4hgaWMEgu3P2CCSEhLNJ5eDWULS/y51sUGUfSJUeLwsjeMIAk2AXOJR9vPgBWJCHhI zJi4mBWkiFmgj1ni88Hz7CAJYQFPiWszLoLZLAKqEn9PXQNr5hVwkTixbCczxAZ5iYZdm8Fq OAVcJTZN+AdWIwRUM2daLzNEvaDEyZlPWEBsZqD65q2zmScwCsxCkpqFJLWAkWkVo0hqaXFu em6xkV5xYm5xaV66XnJ+7iZGYCRtO/Zzyw7GrnfBhxgFOBiVeHglprDFCLEmlhVX5h5ilOBg VhLhvaMGFOJNSaysSi3Kjy8qzUktPsRoCvTERGYp0eR8YJTnlcQbmhqaW1gamhubG5tZKInz njeojBISSE8sSc1OTS1ILYLpY+LglGpgtFujcWbCgYJIC80djr8T3TIKzpQzXwlQT1jIVG7y Xy+TkS0m1StANl7DL/Jfxqv11b+OG/buXTd3wnH21LfXNvfLLVhvNDf9a4/pvbAHN3xjf4Sw F9g9mtPmPM/bSfp2QFJfz/t3TKvbT19QjD+YfCOkRsfXOevlzLYphhE+ydbXc9febu5QYinO SDTUYi4qTgQAAJABmroCAAA= X-CMS-MailID: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 X-Msg-Generator: CA X-RootMTR: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny Acked-by: Stephen Boyd Reviewed-by: Rob Herring Acked-by: Chanwoo Choi --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..183c327a7d6b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -50,6 +50,8 @@ Required Properties: IPs. - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -168,6 +170,12 @@ Required Properties: - aclk_cam1_400 - aclk_cam1_552 + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Optional properties: - power-domains: a phandle to respective power domain node as described by generic PM domain bindings (see power/power_domain.txt for more @@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below. power-domains = <&pd_cam1>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller.