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Tue, 22 Jan 2019 09:02:50 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski , Rob Herring , Stephen Boyd Subject: [PATCH v5 3/5] dt-bindings: clk: exynos5433: document imem clock Date: Tue, 22 Jan 2019 10:02:30 +0100 Message-Id: <20190122090232.29194-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190122090232.29194-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMKsWRmVeSWpSXmKPExsWy7djPc7rWd9xiDJYtNrbYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFv/37GC3 OPymndXi37WNLA58HmvmrWH02LSqk83j4Ls9TB59W1YxenzeJBfAGsVlk5Kak1mWWqRvl8CV sbJnAXvBKsGKd0c3szcwLufrYuTkkBAwkTj+bQtzFyMXh5DACkaJBRs3skI4XxglVnzdwQjh fGaU+H36EyNMy7Z9H6ASyxklOh40McO1nO7sYQGpYhMwl3i0/QwTiC0i4CbRN3k2G0gRs8AJ ZomvDfNZQRLCAp4Smx60M4PYLAKqEkd3TgFr5hVwkfgy8RIrxDp5iWmru8AGcQq4Ssx6tYMN okZQ4uTMJ2D1zEA1zVtng10hIXCMXeLc6w8sEM0uEhcnvWGDsIUlXh3fwg5hy0icntwDVVMu sXvrM3aI5hZGibmTFzFBJKwlDh+/CHQFB9AGTYn1u/Qhwo4S/Yd3goUlBPgkbrwVhLiBT2LS tunMEGFeiY42IYhqXYl5/89AvSIt0fV/HZTtIXHq9j7mCYyKs5B8MwvJN7MQ9i5gZF7FKJ5a WpybnlpslJdarlecmFtcmpeul5yfu4kRmLRO/zv+ZQfjrj9JhxgFOBiVeHgTLrjGCLEmlhVX 5h5ilOBgVhLhdb3oFiPEm5JYWZValB9fVJqTWnyIUZqDRUmct5rhQbSQQHpiSWp2ampBahFM lomDU6qBsWynS/6Cw0fvmN42MzYoPs27Rehswup43xMJDw7JCtxSX2TRddipvqJTMFjYqWhh YfTPnXN3XBXg9nLc/kKYa80ZwYYLPdaaL4OcvmxhkfNmMPHymp5wTfux/clJ9jkzw/+c4c1+ bzrnyuQZF09kFCQ5+ChqLDbhXMov3b+gLJr1SHsEy78sJZbijERDLeai4kQA11NLp1YDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrIIsWRmVeSWpSXmKPExsVy+t/xu7pWd9xiDL4cNbTYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFv/37GC3 OPymndXi37WNLA58HmvmrWH02LSqk83j4Ls9TB59W1YxenzeJBfAGqVnU5RfWpKqkJFfXGKr FG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9nk5Kak1mWWqRvl6CXsbJnAXvBKsGKd0c3szcwLufr YuTkkBAwkdi27wNjFyMXh5DAUkaJL8t2MkEkpCUaT6+GsoUl/lzrYoMo+sQocfX7TGaQBJuA ucSj7WfAikQEPCRmTFzMClLELHCJWeLB4aksIAlhAU+JTQ/awRpYBFQlju6cAhbnFXCR+DLx EivEBnmJaau7wAZxCrhKzHq1gw3EFgKqudp5mRWiXlDi5MwnYL3MQPXNW2czT2AUmIUkNQtJ agEj0ypGkdTS4tz03GJDveLE3OLSvHS95PzcTYzA6Np27OfmHYyXNgYfYhTgYFTi4eU45xoj xJpYVlyZe4hRgoNZSYTX9aJbjBBvSmJlVWpRfnxRaU5q8SFGU6AnJjJLiSbnAyM/ryTe0NTQ 3MLS0NzY3NjMQkmc97xBZZSQQHpiSWp2ampBahFMHxMHp1QDo8oqv1tGr17l3DHY47Vej3t5 9WSB+/8rEpj2adsoad0Rv721IP3ueZf/tvy2c/JtO/1kIxu2vD/7Ysruc4ph52bP+7CIhSHh 7KbwoOT0V5slzqmzvVps8josd2WHmYH0KZ2Pt8znPv7YEHzvSsOMlVduqE2vvv6Ca61zS0FB +Ka5gnK/N2eGHlViKc5INNRiLipOBADgt3WtxAIAAA== X-CMS-MailID: 20190122090251eucas1p2db2f383c0b8b4034f66b6a82b0a22d67 X-Msg-Generator: CA X-RootMTR: 20190122090251eucas1p2db2f383c0b8b4034f66b6a82b0a22d67 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190122090251eucas1p2db2f383c0b8b4034f66b6a82b0a22d67 References: <20190122090232.29194-1-k.konieczny@partner.samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security SubSystem) and SlimSSS IPs. Acked-by: Chanwoo Choi Reviewed-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Kamil Konieczny --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..183c327a7d6b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -50,6 +50,8 @@ Required Properties: IPs. - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -168,6 +170,12 @@ Required Properties: - aclk_cam1_400 - aclk_cam1_552 + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Optional properties: - power-domains: a phandle to respective power domain node as described by generic PM domain bindings (see power/power_domain.txt for more @@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below. power-domains = <&pd_cam1>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller.