From patchwork Fri Feb 1 15:42:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10793113 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0C32913B4 for ; Fri, 1 Feb 2019 15:47:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7B0A3220B for ; Fri, 1 Feb 2019 15:47:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DAF83322C2; Fri, 1 Feb 2019 15:47:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6FC4E3220B for ; Fri, 1 Feb 2019 15:47:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729564AbfBAPrY (ORCPT ); Fri, 1 Feb 2019 10:47:24 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:38940 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727743AbfBAPmy (ORCPT ); Fri, 1 Feb 2019 10:42:54 -0500 Received: by mail-lf1-f68.google.com with SMTP id n18so5375729lfh.6 for ; Fri, 01 Feb 2019 07:42:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TFKtwWbXDyUWT8qfJQdNKmTE4M3/0ezirQXsds5l2UY=; b=TFDss/RbpOFlaY0pWWUTNxWwScvM6xjusFKv0iPtef7zFK/kvLYAlgDybWbhac398K fSO9j4Q92zuJCwOI0Bf2W4fgV2Ru6//VyG8oEMG+cr3hml2NaPvTD4x/Sbd2YhDxcSQt YYqXzbcdn3lxNnXm0Ezdev5F1ZXUBfEZWAQw0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TFKtwWbXDyUWT8qfJQdNKmTE4M3/0ezirQXsds5l2UY=; b=AVeK2Qcql/CImLJwb6tBfNx1aGH+ReoOUaqUsNrjV4trZ/nhFMYwyHBOcEtmoCrG/+ bOhWZKQl6p89NixYBL170hFWAcXaZMzClMTXnu3qw0aAtRIwDT7dJPHqkFTjNdkJ+/P+ K0m9n6bdyetkFeID0FoOj9nf6tCEPW328Pk73+ajhcJ52ACfPd7nQK9UXekpQSzdb9X+ qXNBlkkuHQmnOcbJpMlb5p6RDn0hPQlxWBX9waXBTIyBavGvHRnw+k3Er80umvnRo6Tn j3PPsHBeZswFVS8I4pReJXPugAS5FOLgi9FtelB5/wDmjoUFUQpP5zykhUxA6lUKXC1m oMIw== X-Gm-Message-State: AHQUAuaeB0j1GM5NQ7m+GBv6g0nTrNGvvuloFeeg/8TlI8yyg72YJFzP uvkqr3JBx+cq+LwweO8rapqXVg== X-Google-Smtp-Source: AHgI3IZ0Z2Ru8GyS56Z09JmdGKrORyR6EsHkGG9PJJ1Tsacbdb7LlqphoL23RjCgnvd1ilES3r1KVA== X-Received: by 2002:ac2:4254:: with SMTP id m20mr354627lfl.131.1549035772005; Fri, 01 Feb 2019 07:42:52 -0800 (PST) Received: from localhost.localdomain ([217.76.202.68]) by smtp.gmail.com with ESMTPSA id i13-v6sm1305712ljg.82.2019.02.01.07.42.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 07:42:51 -0800 (PST) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , Michael Turquette , Rob Herring , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Michael Trimarchi , linux-amarula@amarulasolutions.com, linux-sunxi@googlegroups.com, Jagan Teki Subject: [PATCH v7 04/23] drm/sun4i: sun6i_mipi_dsi: Simplify drq to support all modes Date: Fri, 1 Feb 2019 21:12:13 +0530 Message-Id: <20190201154232.10505-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190201154232.10505-1-jagan@amarulasolutions.com> References: <20190201154232.10505-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner MIPI DSI drq has enable mode bit and set bits. 1) drq for non-burst, with front porch less than 20 would need to set both enable mode bit and set bits. 2) drq for non-burst, with front porch greater or equal to 20 would not require to do any drq bit setup. 3) drq for burst mode, would only need to set enable mode bit. This patch simplifies existing drq code by grouping into sun6i_dsi_get_drq and support all video modes. Signed-off-by: Jagan Teki Tested-by: Merlijn Wajer --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 39 ++++++++++++++++---------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 0f02bcc997a5..16a86d35dc5a 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -354,6 +354,28 @@ static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, SUN6I_DSI_INST_JUMP_CFG_NUM(1)); }; +static int sun6i_dsi_get_drq(struct sun6i_dsi *dsi, + struct drm_display_mode *mode) +{ + struct mipi_dsi_device *device = dsi->device; + + if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) + return SUN6I_DSI_TCON_DRQ_ENABLE_MODE; + + if ((mode->hsync_start - mode->hdisplay) > 20) { + /* Maaaaaagic */ + u16 drq = (mode->hsync_start - mode->hdisplay) - 20; + + drq *= mipi_dsi_pixel_format_to_bpp(device->format); + drq /= 32; + + return (SUN6I_DSI_TCON_DRQ_ENABLE_MODE | + SUN6I_DSI_TCON_DRQ_SET(drq)); + } + + return 0; +} + static u16 sun6i_dsi_setup_inst_delay(struct sun6i_dsi *dsi, struct drm_display_mode *mode) { @@ -381,21 +403,8 @@ static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi, static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi, struct drm_display_mode *mode) { - struct mipi_dsi_device *device = dsi->device; - u32 val = 0; - - if ((mode->hsync_end - mode->hdisplay) > 20) { - /* Maaaaaagic */ - u16 drq = (mode->hsync_end - mode->hdisplay) - 20; - - drq *= mipi_dsi_pixel_format_to_bpp(device->format); - drq /= 32; - - val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE | - SUN6I_DSI_TCON_DRQ_SET(drq)); - } - - regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val); + regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, + sun6i_dsi_get_drq(dsi, mode)); } static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,