| Message ID | 20190402210623.14988-4-jernej.skrabec@siol.net (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: sunxi-ng: H6 related clock fixes | expand |
On Tue, Apr 02, 2019 at 11:06:23PM +0200, Jernej Skrabec wrote: > Video related clocks need to set rate as close as possible to the > requested one, so they should be able to change parent clock rate. > > VPU clock sometimes has to be set to higher than default parent clock > rate. This is requ > > Add CLK_SET_RATE_PARENT flag to tcon-lcd0, tcon-tv0 and ve. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Applied, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
On Wed, Apr 3, 2019 at 3:54 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Tue, Apr 02, 2019 at 11:06:23PM +0200, Jernej Skrabec wrote: > > Video related clocks need to set rate as close as possible to the > > requested one, so they should be able to change parent clock rate. > > > > VPU clock sometimes has to be set to higher than default parent clock > > rate. This is requ The commit log looks unfinished. Can you and Jernej fix this up? > > Add CLK_SET_RATE_PARENT flag to tcon-lcd0, tcon-tv0 and ve. > > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > Applied, thanks! > Maxime > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com
Dne sreda, 03. april 2019 ob 15:22:52 CEST je Chen-Yu Tsai napisal(a): > On Wed, Apr 3, 2019 at 3:54 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Tue, Apr 02, 2019 at 11:06:23PM +0200, Jernej Skrabec wrote: > > > Video related clocks need to set rate as close as possible to the > > > requested one, so they should be able to change parent clock rate. > > > > > > VPU clock sometimes has to be set to higher than default parent clock > > > rate. This is requ > > The commit log looks unfinished. Can you and Jernej fix this up? Ah, sorry. I will send v2 with this commit message fixed and additional patch as requested by Maxime. Best regards, Jernej > > > > Add CLK_SET_RATE_PARENT flag to tcon-lcd0, tcon-tv0 and ve. > > > > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > > > Applied, thanks! > > Maxime > > > > -- > > Maxime Ripard, Bootlin > > Embedded Linux and Kernel engineering > > https://bootlin.com
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c index 33980067b06e..3c32d7798f27 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c @@ -311,7 +311,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(ve_clk, "ve", ve_parents, 0x690, 0, 3, /* M */ 24, 1, /* mux */ BIT(31), /* gate */ - 0); + CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb1-ahb2", 0x69c, BIT(0), 0); @@ -691,7 +691,7 @@ static SUNXI_CCU_MUX_WITH_GATE(tcon_lcd0_clk, "tcon-lcd0", tcon_lcd0_parents, 0xb60, 24, 3, /* mux */ BIT(31), /* gate */ - 0); + CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(bus_tcon_lcd0_clk, "bus-tcon-lcd0", "ahb3", 0xb7c, BIT(0), 0); @@ -706,7 +706,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_tv0_clk, "tcon-tv0", 8, 2, /* P */ 24, 3, /* mux */ BIT(31), /* gate */ - 0); + CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(bus_tcon_tv0_clk, "bus-tcon-tv0", "ahb3", 0xb9c, BIT(0), 0);
Video related clocks need to set rate as close as possible to the requested one, so they should be able to change parent clock rate. VPU clock sometimes has to be set to higher than default parent clock rate. This is requ Add CLK_SET_RATE_PARENT flag to tcon-lcd0, tcon-tv0 and ve. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)