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[46.91.239.54]) by smtp.gmail.com with ESMTPSA id q15sm150497wrr.19.2019.06.13.09.12.28 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 13 Jun 2019 09:12:28 -0700 (PDT) From: Thierry Reding To: Michael Turquette , Stephen Boyd Cc: Jonathan Hunter , Peter De Schrijver , Alex Frid , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 3/3] clk: tegra: Do not enable PLL_RE_VCO on Tegra210 Date: Thu, 13 Jun 2019 18:12:25 +0200 Message-Id: <20190613161225.2531-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190613161225.2531-1-thierry.reding@gmail.com> References: <20190613161225.2531-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding It turns out that this PLL is not used on Tegra210, so there's no need to enable it via the init table. Remove the init table entry for this PLL to avoid it getting enabled at boot time. If the bootloader enabled it and forgot to turn it off, the common clock framework will now know to disable it because it is unused. Signed-off-by: Thierry Reding Acked-by: Jon Hunter --- drivers/clk/tegra/clk-tegra210.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 793c7acaf4e2..13537e4458b5 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -3337,7 +3337,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_SBC4, TEGRA210_CLK_PLL_P, 12000000, 1 }, - { TEGRA210_CLK_PLL_RE_VCO, TEGRA210_CLK_CLK_MAX, 672000000, 1 }, { TEGRA210_CLK_XUSB_GATE, TEGRA210_CLK_CLK_MAX, 0, 1 }, { TEGRA210_CLK_XUSB_SS_SRC, TEGRA210_CLK_PLL_U_480M, 120000000, 0 }, { TEGRA210_CLK_XUSB_FS_SRC, TEGRA210_CLK_PLL_U_48M, 48000000, 0 },