| Message ID | 20190728031227.49140-5-icenowy@aosc.io (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Support for Allwinner V3/S3L and Sochip S3 | expand |
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi new file mode 100644 index 000000000000..6ae8645ade50 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-v3.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> + */ + +#include "sun8i-v3s.dtsi" + +&ccu { + compatible = "allwinner,sun8i-v3-ccu"; +}; + +&pio { + compatible = "allwinner,sun8i-v3-pinctrl"; +};
The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC, but with more GPIO wired out of the package. Add a DTSI file for these SoCs. It just replaces some compatible strings of the V3s DTSI now. As these SoCs share the same feature set on Linux, we use the first known chip (V3) as the file's name. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- Changes in v5: - Dropped dedicated S3/S3L DTSIs. No changes until v5. arch/arm/boot/dts/sun8i-v3.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi