Message ID | 20190731202929.16443-9-jorge.ramirez-ortiz@linaro.org (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | Support CPU frequency scaling on QCS404 | expand |
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index 0ffed0d41c50..d5fd27938e7b 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -58,6 +58,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev) .parent_names = (const char *[]){ "xo" }, .num_parents = 1, .ops = &clk_ops_hfpll, + /* + * rather than marking the clock critical and forcing the clock + * to be always enabled, we make sure that the clock is not + * disabled: the firmware remains responsible of enabling this + * clock (for more info check the commit log) + */ + .flags = CLK_IGNORE_UNUSED, }; h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);