| Message ID | 20191206134202.18784-4-chris.brandt@renesas.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | spi: Add Renesas SPIBSC controller | expand |
On 12/06/2019 04:41 PM, Chris Brandt wrote: > The SPIBSC clocks are marked as critical because for XIP systems, the > kernel will be running from QSPI flash and cannot be turned off. > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > v2: > * Removed spibsc from critical clock section So you've removed it from the critical table but left the patch description intact? [...] MBR, Sergei
On Fri, Dec 6, 2019, Sergei Shtylyov wrote: > On 12/06/2019 04:41 PM, Chris Brandt wrote: > > > The SPIBSC clocks are marked as critical because for XIP systems, the > > kernel will be running from QSPI flash and cannot be turned off. > > > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > > --- > > v2: > > * Removed spibsc from critical clock section > > So you've removed it from the critical table but left the patch > description intact? Damn! Thank you for pointing that out. I remembered to take the comment out of one patch, but I missed this one. Chris
On Fri, Dec 6, 2019 at 8:49 PM Chris Brandt <Chris.Brandt@renesas.com> wrote: > On Fri, Dec 6, 2019, Sergei Shtylyov wrote: > > On 12/06/2019 04:41 PM, Chris Brandt wrote: > > > > > The SPIBSC clocks are marked as critical because for XIP systems, the > > > kernel will be running from QSPI flash and cannot be turned off. > > > > > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > > > --- > > > v2: > > > * Removed spibsc from critical clock section > > > > So you've removed it from the critical table but left the patch > > description intact? > > Damn! > Thank you for pointing that out. > I remembered to take the comment out of one patch, but I missed this one. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in clk-renesas-for-v5.6, with the description changed to "Add SPIBSC clock for RZ/A2.". Gr{oetje,eeting}s, Geert
Hi Geert, On Fri, Dec 20, 2019, Geert Uytterhoeven wrote: > i.e. will queue in clk-renesas-for-v5.6, with the description changed to > "Add SPIBSC clock for RZ/A2.". Thank you! Chris
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c b/drivers/clk/renesas/r7s9210-cpg-mssr.c index 14093503c085..261d88ae990b 100644 --- a/drivers/clk/renesas/r7s9210-cpg-mssr.c +++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c @@ -93,6 +93,7 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = { DEF_MOD_STB("ether1", 64, R7S9210_CLK_B), DEF_MOD_STB("ether0", 65, R7S9210_CLK_B), + DEF_MOD_STB("spibsc", 83, R7S9210_CLK_P1), DEF_MOD_STB("i2c3", 84, R7S9210_CLK_P1), DEF_MOD_STB("i2c2", 85, R7S9210_CLK_P1), DEF_MOD_STB("i2c1", 86, R7S9210_CLK_P1),
The SPIBSC clocks are marked as critical because for XIP systems, the kernel will be running from QSPI flash and cannot be turned off. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> --- v2: * Removed spibsc from critical clock section --- drivers/clk/renesas/r7s9210-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)