From patchwork Fri Dec 20 06:53:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11304903 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EA910109A for ; Fri, 20 Dec 2019 06:53:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D23D824683 for ; Fri, 20 Dec 2019 06:53:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726327AbfLTGxh (ORCPT ); Fri, 20 Dec 2019 01:53:37 -0500 Received: from [167.172.186.51] ([167.172.186.51]:59184 "EHLO shell.v3.sk" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725801AbfLTGxX (ORCPT ); Fri, 20 Dec 2019 01:53:23 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 6B417DFC76; Fri, 20 Dec 2019 06:53:24 +0000 (UTC) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id BUYhCElFSDFC; Fri, 20 Dec 2019 06:53:22 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id B51E1DFC5E; Fri, 20 Dec 2019 06:53:22 +0000 (UTC) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id rSDtHG59z_Kv; Fri, 20 Dec 2019 06:53:22 +0000 (UTC) Received: from furthur.lan (unknown [109.183.109.54]) by zimbra.v3.sk (Postfix) with ESMTPSA id C846ADFCA3; Fri, 20 Dec 2019 06:53:21 +0000 (UTC) From: Lubomir Rintel To: Olof Johansson Cc: Arnd Bergmann , Kishon Vijay Abraham I , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, soc@kernel.org, Lubomir Rintel Subject: [PATCH 4/5] ARM: dts: mmp3: Add HSIC controllers Date: Fri, 20 Dec 2019 07:53:13 +0100 Message-Id: <20191220065314.237624-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191220065314.237624-1-lkundrak@v3.sk> References: <20191220065314.237624-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org There are two on MMP3, along with the PHYs. The PHYs are made compatible with the NOP transceiver, since there's no driver for the time being and they're likely configured by the firmware. Signed-off-by: Lubomir Rintel Reported-by: kbuild test robot Signed-off-by: Olof Johansson --- arch/arm/boot/dts/mmp3.dtsi | 44 +++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi index d9762de0ed34b..36c50706e60e0 100644 --- a/arch/arm/boot/dts/mmp3.dtsi +++ b/arch/arm/boot/dts/mmp3.dtsi @@ -201,6 +201,50 @@ usb_otg0: usb-otg@d4208000 { status = "disabled"; }; + hsic_phy0: hsic-phy@f0001800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0001800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic0: hsic@f0001000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0001000 0x200>; + interrupts = ; + clocks = <&soc_clocks MMP2_CLK_USBHSIC0>; + clock-names = "USBCLK"; + phys = <&hsic_phy0>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + + hsic_phy1: hsic-phy@f0002800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0002800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic1: hsic@f0002000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0002000 0x200>; + interrupts = ; + clocks = <&soc_clocks MMP2_CLK_USBHSIC1>; + clock-names = "USBCLK"; + phys = <&hsic_phy1>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + mmc1: mmc@d4280000 { compatible = "mrvl,pxav3-mmc"; reg = <0xd4280000 0x120>;