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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:41 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 1/4] clk: qcom: gdsc: Handle GDSC regulator supplies Date: Wed, 18 Mar 2020 22:38:59 -0700 Message-Id: <20200319053902.3415984-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Certain GDSCs, such as the GPU_GX on MSM8996, requires that the upstream regulator supply is powered in order to be turned on. It's not guaranteed that the bootloader will leave these supplies on and the driver core will attempt to enable any GDSCs before allowing the individual drivers to probe defer on the PMIC regulator driver not yet being present. So the gdsc driver needs to be made aware of supplying regulators and probe defer on their absence, and it needs to enable and disable the regulator accordingly. Voltage adjustments of the supplying regulator are deferred to the client drivers themselves. Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/gdsc.c | 24 ++++++++++++++++++++++++ drivers/clk/qcom/gdsc.h | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index a250f59708d8..3528789cc9d0 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "gdsc.h" #define PWR_ON_MASK BIT(31) @@ -112,6 +113,12 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) int ret; u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK; + if (status == GDSC_ON && sc->rsupply) { + ret = regulator_enable(sc->rsupply); + if (ret < 0) + return ret; + } + ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val); if (ret) return ret; @@ -143,6 +150,13 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) ret = gdsc_poll_status(sc, status); WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); + + if (!ret && status == GDSC_OFF && sc->rsupply) { + ret = regulator_disable(sc->rsupply); + if (ret < 0) + return ret; + } + return ret; } @@ -371,6 +385,16 @@ int gdsc_register(struct gdsc_desc *desc, if (!data->domains) return -ENOMEM; + /* Resolve any regulator supplies */ + for (i = 0; i < num; i++) { + if (!scs[i] || !scs[i]->supply) + continue; + + scs[i]->rsupply = devm_regulator_get(dev, scs[i]->supply); + if (IS_ERR(scs[i]->rsupply)) + return PTR_ERR(scs[i]->rsupply); + } + data->num_domains = num; for (i = 0; i < num; i++) { if (!scs[i]) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 64cdc8cf0d4d..c36fc26dcdff 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -10,6 +10,7 @@ #include struct regmap; +struct regulator; struct reset_controller_dev; /** @@ -52,6 +53,9 @@ struct gdsc { struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; + + const char *supply; + struct regulator *rsupply; }; struct gdsc_desc {