| Message ID | 20200417221730.555954-5-plaes@plaes.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | ARM: sun7i: Convert A20 GMAC driver to CCU | expand |
On Sat, Apr 18, 2020 at 01:17:30AM +0300, Priit Laes wrote: > Use syscon-based approach to access gmac clock configuration > register, instead of relying on a custom clock driver. > > As a bonus, we can now drop the custom clock implementation > and dummy clocks making sun7i fully CCU-compatible. > > Signed-off-by: Priit Laes <plaes@plaes.org> > --- > arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++----------------------------- > 1 file changed, 3 insertions(+), 33 deletions(-) > > diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi > index ffe1d10a1a84..750962a94fad 100644 > --- a/arch/arm/boot/dts/sun7i-a20.dtsi > +++ b/arch/arm/boot/dts/sun7i-a20.dtsi > @@ -219,37 +219,6 @@ osc32k: clk-32k { > clock-frequency = <32768>; > clock-output-names = "osc32k"; > }; > - > - /* > - * The following two are dummy clocks, placeholders > - * used in the gmac_tx clock. The gmac driver will > - * choose one parent depending on the PHY interface > - * mode, using clk_set_rate auto-reparenting. > - * > - * The actual TX clock rate is not controlled by the > - * gmac_tx clock. > - */ > - mii_phy_tx_clk: clk-mii-phy-tx { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <25000000>; > - clock-output-names = "mii_phy_tx"; > - }; > - > - gmac_int_tx_clk: clk-gmac-int-tx { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_int_tx"; > - }; > - > - gmac_tx_clk: clk@1c20164 { > - #clock-cells = <0>; > - compatible = "allwinner,sun7i-a20-gmac-clk"; > - reg = <0x01c20164 0x4>; > - clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; > - clock-output-names = "gmac_tx"; > - }; > }; > > > @@ -1511,11 +1480,12 @@ mali: gpu@1c40000 { > > gmac: ethernet@1c50000 { > compatible = "allwinner,sun7i-a20-gmac"; > + syscon = <&ccu>; > reg = <0x01c50000 0x10000>; > interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "macirq"; > - clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>; > - clock-names = "stmmaceth", "allwinner_gmac_tx"; > + clocks = <&ccu CLK_AHB_GMAC>; > + clock-names = "stmmaceth"; I guess you also need to update the binding so that it considers it valid? Maxime
On Mon, Apr 20, 2020 at 02:59:19PM +0200, Maxime Ripard wrote: > On Sat, Apr 18, 2020 at 01:17:30AM +0300, Priit Laes wrote: > > Use syscon-based approach to access gmac clock configuration > > register, instead of relying on a custom clock driver. > > > > As a bonus, we can now drop the custom clock implementation > > and dummy clocks making sun7i fully CCU-compatible. > > > > Signed-off-by: Priit Laes <plaes@plaes.org> > > --- > > arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++----------------------------- > > 1 file changed, 3 insertions(+), 33 deletions(-) > > > > diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi > > index ffe1d10a1a84..750962a94fad 100644 > > --- a/arch/arm/boot/dts/sun7i-a20.dtsi > > +++ b/arch/arm/boot/dts/sun7i-a20.dtsi > > @@ -219,37 +219,6 @@ osc32k: clk-32k { > > clock-frequency = <32768>; > > clock-output-names = "osc32k"; > > }; > > - > > - /* > > - * The following two are dummy clocks, placeholders > > - * used in the gmac_tx clock. The gmac driver will > > - * choose one parent depending on the PHY interface > > - * mode, using clk_set_rate auto-reparenting. > > - * > > - * The actual TX clock rate is not controlled by the > > - * gmac_tx clock. > > - */ > > - mii_phy_tx_clk: clk-mii-phy-tx { > > - #clock-cells = <0>; > > - compatible = "fixed-clock"; > > - clock-frequency = <25000000>; > > - clock-output-names = "mii_phy_tx"; > > - }; > > - > > - gmac_int_tx_clk: clk-gmac-int-tx { > > - #clock-cells = <0>; > > - compatible = "fixed-clock"; > > - clock-frequency = <125000000>; > > - clock-output-names = "gmac_int_tx"; > > - }; > > - > > - gmac_tx_clk: clk@1c20164 { > > - #clock-cells = <0>; > > - compatible = "allwinner,sun7i-a20-gmac-clk"; > > - reg = <0x01c20164 0x4>; > > - clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; > > - clock-output-names = "gmac_tx"; > > - }; > > }; > > > > > > @@ -1511,11 +1480,12 @@ mali: gpu@1c40000 { > > > > gmac: ethernet@1c50000 { > > compatible = "allwinner,sun7i-a20-gmac"; > > + syscon = <&ccu>; > > reg = <0x01c50000 0x10000>; > > interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "macirq"; > > - clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>; > > - clock-names = "stmmaceth", "allwinner_gmac_tx"; > > + clocks = <&ccu CLK_AHB_GMAC>; > > + clock-names = "stmmaceth"; > > I guess you also need to update the binding so that it considers it valid? Yes, will do it in the next round. > > Maxime
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index ffe1d10a1a84..750962a94fad 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -219,37 +219,6 @@ osc32k: clk-32k { clock-frequency = <32768>; clock-output-names = "osc32k"; }; - - /* - * The following two are dummy clocks, placeholders - * used in the gmac_tx clock. The gmac driver will - * choose one parent depending on the PHY interface - * mode, using clk_set_rate auto-reparenting. - * - * The actual TX clock rate is not controlled by the - * gmac_tx clock. - */ - mii_phy_tx_clk: clk-mii-phy-tx { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "mii_phy_tx"; - }; - - gmac_int_tx_clk: clk-gmac-int-tx { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_int_tx"; - }; - - gmac_tx_clk: clk@1c20164 { - #clock-cells = <0>; - compatible = "allwinner,sun7i-a20-gmac-clk"; - reg = <0x01c20164 0x4>; - clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; - clock-output-names = "gmac_tx"; - }; }; @@ -1511,11 +1480,12 @@ mali: gpu@1c40000 { gmac: ethernet@1c50000 { compatible = "allwinner,sun7i-a20-gmac"; + syscon = <&ccu>; reg = <0x01c50000 0x10000>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; - clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>; - clock-names = "stmmaceth", "allwinner_gmac_tx"; + clocks = <&ccu CLK_AHB_GMAC>; + clock-names = "stmmaceth"; snps,pbl = <2>; snps,fixed-burst; snps,force_sf_dma_mode;
Use syscon-based approach to access gmac clock configuration register, instead of relying on a custom clock driver. As a bonus, we can now drop the custom clock implementation and dummy clocks making sun7i fully CCU-compatible. Signed-off-by: Priit Laes <plaes@plaes.org> --- arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++----------------------------- 1 file changed, 3 insertions(+), 33 deletions(-)