| Message ID | 20200517174834.126920-1-sboyd@kernel.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [GIT,PULL] clk fixes for v5.7-rc5 | expand |
The pull request you sent on Sun, 17 May 2020 10:48:34 -0700:
> https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git tags/clk-fixes-for-linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9b1f2cbdb6d3062c468d3f9b579501f0f7ce330b
Thank you!
The following changes since commit ca6df49d62d7cc4c1653a4d9b1ecc61ecd530e02: clk: sprd: don't gate uart console clock (2020-04-13 12:20:07 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git tags/clk-fixes-for-linus for you to fetch changes up to 852049594b9af58fa2972103699fd58a7ac165c6: clk: ti: clkctrl: convert subclocks to use proper names also (2020-05-12 20:18:19 -0700) ---------------------------------------------------------------- Some more clk driver fixes for the merge window and one core framework fix: - A handful of TI driver fixes for bad of_node_put() and incorrect parent names - Rockchip rk3228 aclk_gpu* creation was interfering with lima GPU work so we use a composite clk now - Resuming from suspend on Tegra Jetson TK1 was broken because an audio PLL calculated an incorrect rate - A fix for devicetree probing on IM-PD1 by actually specifying a clk name which is required to pass clk registration - Avoid list corruption if registration fails for a critical clk ---------------------------------------------------------------- Justin Swartz (1): clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks Linus Walleij (1): clk: impd1: Look up clock-output-names Marc Zyngier (1): clk: Unlink clock if failed to prepare or enable Stephen Boyd (1): Merge tag 'v5.7-rockchip-clk-fixes1' of git://git.kernel.org/.../mmind/linux-rockchip into clk-fixes Tero Kristo (3): clk: ti: clkctrl: Fix Bad of_node_put within clkctrl_get_name clk: ti: am33xx: fix RTC clock parent clk: ti: clkctrl: convert subclocks to use proper names also Thierry Reding (1): clk: tegra: Fix initial rate for pll_a on Tegra124 drivers/clk/clk.c | 3 ++ drivers/clk/rockchip/clk-rk3228.c | 17 ++----- drivers/clk/tegra/clk-tegra124.c | 2 +- drivers/clk/ti/clk-33xx.c | 2 +- drivers/clk/ti/clkctrl.c | 99 +++++++++++++++++++-------------------- drivers/clk/versatile/clk-impd1.c | 1 + 6 files changed, 58 insertions(+), 66 deletions(-)