| Message ID | 20200616202417.14376-3-dinguyen@kernel.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [1/3] dt-bindings: agilex: add NAND_X_CLK and NAND_ECC_CLK | expand |
Quoting Dinh Nguyen (2020-06-16 13:24:17) > Preliminary documentation documented the mpu_l2ram_clk, but since then, > the mpu_l2ram_clk is no longer documented. It's now referred to as > mpu_ccu_clk. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- Applied to clk-next
diff --git a/drivers/clk/socfpga/clk-agilex.c b/drivers/clk/socfpga/clk-agilex.c index 1b2e0ad01b24..8fb12cbe0208 100644 --- a/drivers/clk/socfpga/clk-agilex.c +++ b/drivers/clk/socfpga/clk-agilex.c @@ -252,7 +252,7 @@ static const struct stratix10_gate_clock agilex_gate_clks[] = { 0, 0, 0, 0, 0x30, 0, 0}, { AGILEX_MPU_PERIPH_CLK, "mpu_periph_clk", "mpu_clk", NULL, 1, 0, 0x24, 0, 0, 0, 0, 0, 0, 4}, - { AGILEX_MPU_L2RAM_CLK, "mpu_l2ram_clk", "mpu_clk", NULL, 1, 0, 0x24, + { AGILEX_MPU_CCU_CLK, "mpu_ccu_clk", "mpu_clk", NULL, 1, 0, 0x24, 0, 0, 0, 0, 0, 0, 2}, { AGILEX_L4_MAIN_CLK, "l4_main_clk", "noc_clk", NULL, 1, 0, 0x24, 1, 0x44, 0, 2, 0, 0, 0},
Preliminary documentation documented the mpu_l2ram_clk, but since then, the mpu_l2ram_clk is no longer documented. It's now referred to as mpu_ccu_clk. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- drivers/clk/socfpga/clk-agilex.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)