diff mbox series

clk: rockchip: add CLK_IGNORE_UNUSED to RK3188 sclk_mac_lbtest

Message ID 20200722143137.863-1-knaerzche@gmail.com (mailing list archive)
State Changes Requested, archived
Headers show
Series clk: rockchip: add CLK_IGNORE_UNUSED to RK3188 sclk_mac_lbtest | expand

Commit Message

Alex Bee July 22, 2020, 2:31 p.m. UTC
Since the loopbacktest clock is not exported and is not touched in the
driver, it needs the CLK_IGNORE_UNUSED flag in order to get the emac
working.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
 drivers/clk/rockchip/clk-rk3188.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Heiko Stübner July 22, 2020, 2:37 p.m. UTC | #1
Hi,

Am Mittwoch, 22. Juli 2020, 16:31:37 CEST schrieb Alex Bee:
> Since the loopbacktest clock is not exported and is not touched in the
> driver, it needs the CLK_IGNORE_UNUSED flag in order to get the emac
> working.

could you please add it to the rk3188_critical_clocks array instead.
CLK_IGNORE_UNUSED only protects it against the clock subsystem
disabling it on boot, while as critical clock it also gets protected later.

Thanks
Heiko


> 
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
>  drivers/clk/rockchip/clk-rk3188.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
> index 77aebfb1d6d5..892b1edc3444 100644
> --- a/drivers/clk/rockchip/clk-rk3188.c
> +++ b/drivers/clk/rockchip/clk-rk3188.c
> @@ -354,7 +354,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
>  			RK2928_CLKGATE_CON(2), 5, GFLAGS),
>  	MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
>  			RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
> -	GATE(0, "sclk_mac_lbtest", "sclk_macref", 0,
> +	GATE(0, "sclk_mac_lbtest", "sclk_macref", CLK_IGNORE_UNUSED,
>  			RK2928_CLKGATE_CON(2), 12, GFLAGS),
>  
>  	COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
>
Alex Bee July 22, 2020, 4:21 p.m. UTC | #2
Hi Heiko,

Am 22.07.20 um 16:37 schrieb Heiko Stübner:
> Hi,
>
> Am Mittwoch, 22. Juli 2020, 16:31:37 CEST schrieb Alex Bee:
>> Since the loopbacktest clock is not exported and is not touched in the
>> driver, it needs the CLK_IGNORE_UNUSED flag in order to get the emac
>> working.
> could you please add it to the rk3188_critical_clocks array instead.
> CLK_IGNORE_UNUSED only protects it against the clock subsystem
> disabling it on boot, while as critical clock it also gets protected later.
>
> Thanks
> Heiko
>
wasn't aware of that and changed it in v2.
>> Signed-off-by: Alex Bee <knaerzche@gmail.com>
>> ---
>>   drivers/clk/rockchip/clk-rk3188.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
>> index 77aebfb1d6d5..892b1edc3444 100644
>> --- a/drivers/clk/rockchip/clk-rk3188.c
>> +++ b/drivers/clk/rockchip/clk-rk3188.c
>> @@ -354,7 +354,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
>>   			RK2928_CLKGATE_CON(2), 5, GFLAGS),
>>   	MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
>>   			RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
>> -	GATE(0, "sclk_mac_lbtest", "sclk_macref", 0,
>> +	GATE(0, "sclk_mac_lbtest", "sclk_macref", CLK_IGNORE_UNUSED,
>>   			RK2928_CLKGATE_CON(2), 12, GFLAGS),
>>   
>>   	COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
>>
>
>
>
Regards,

Alex
diff mbox series

Patch

diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 77aebfb1d6d5..892b1edc3444 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -354,7 +354,7 @@  static struct rockchip_clk_branch common_clk_branches[] __initdata = {
 			RK2928_CLKGATE_CON(2), 5, GFLAGS),
 	MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
 			RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
-	GATE(0, "sclk_mac_lbtest", "sclk_macref", 0,
+	GATE(0, "sclk_mac_lbtest", "sclk_macref", CLK_IGNORE_UNUSED,
 			RK2928_CLKGATE_CON(2), 12, GFLAGS),
 
 	COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,