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[1/2] clk: samsung: exynos5420: Add definition of clock ID for mout_sw_aclk_g3d

Message ID 20200811112645.24596-1-s.nawrocki@samsung.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series [1/2] clk: samsung: exynos5420: Add definition of clock ID for mout_sw_aclk_g3d | expand

Commit Message

Sylwester Nawrocki/Kernel \(PLT\) /SRPOL/Staff Engineer/Samsung Electronics Aug. 11, 2020, 11:26 a.m. UTC 
This patch adds ID for the mout_sw_aclk_g3d (SW_CLKMUX_ACLK_G3D) clock,
mostly for internal use in the CMU driver. It will allow to avoid the
__clk_lookup() call when setting up the clock during the clock provider
initialization.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
 include/dt-bindings/clock/exynos5420.h | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 02d5ac4..ff917c8 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -230,6 +230,7 @@ 
 #define CLK_MOUT_USER_MAU_EPLL	659
 #define CLK_MOUT_SCLK_SPLL	660
 #define CLK_MOUT_MX_MSPLL_CCORE_PHY	661
+#define CLK_MOUT_SW_ACLK_G3D	662
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL		768