diff mbox series

[v2] clk: qcom: lpasscc: Re-configure the PLL in case lost

Message ID 20201014085758.v2.1.Id0cc5d859e2422082a29a7909658932c857f5a81@changeid (mailing list archive)
State Changes Requested, archived
Headers show
Series [v2] clk: qcom: lpasscc: Re-configure the PLL in case lost | expand

Commit Message

Doug Anderson Oct. 14, 2020, 3:58 p.m. UTC 
From: Taniya Das <tdas@codeaurora.org>

In the case where the PLL configuration is lost, then the pm runtime
resume will reconfigure before usage.

Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180")
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
I took the liberty of fixing my own nits that I had with Taniya's
patch, AKA:

https://lore.kernel.org/r/1602614008-2421-2-git-send-email-tdas@codeaurora.org

Changes in v2:
- Don't needlessly have a 2nd copy of dev_pm_ops and jam it in.
- Check the return value of pm_clk_resume()
- l_val should be unsigned int.

 drivers/clk/qcom/lpasscorecc-sc7180.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

Comments

Stephen Boyd Oct. 14, 2020, 5:06 p.m. UTC | #1 
Quoting Douglas Anderson (2020-10-14 08:58:24)
> diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
> index 228d08f5d26f..ee23eb5b9bf2 100644
> --- a/drivers/clk/qcom/lpasscorecc-sc7180.c
> +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
> @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
>         .num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
>  };
>  
> +static int lpass_core_cc_pm_clk_resume(struct device *dev)
> +{
> +       struct regmap *regmap = dev_get_drvdata(dev);

Can we use dev_get_remap(dev, NULL) instead?

> +       unsigned int l_val;
> +       int ret;
> +
> +       ret = pm_clk_resume(dev);
> +       if (ret)
> +               return ret;
> +
> +       /* Read PLL_L_VAL */

Please drop this useless comment. Replace it with something like this
(if at all):

	/* Reconfigure PLL if PLL was reset across suspend */

> +       regmap_read(regmap, 0x1004, &l_val);
> +       if (!l_val)
> +               clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
> +                               &lpass_lpaaudio_dig_pll_config);
> +
> +       return 0;
> +}
> +
>  static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
>  {
>         const struct qcom_cc_desc *desc;
> @@ -373,6 +392,8 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
>         if (IS_ERR(regmap))
>                 return PTR_ERR(regmap);
>  
> +       dev_set_drvdata(&pdev->dev, regmap);
> +

And then this isn't needed.

>         /*
>          * Keep the CLK always-ON
>          * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
Taniya Das Oct. 14, 2020, 5:21 p.m. UTC | #2 
Thanks Doug for the patch.

On 10/14/2020 9:28 PM, Douglas Anderson wrote:
> From: Taniya Das <tdas@codeaurora.org>
> 
> In the case where the PLL configuration is lost, then the pm runtime
> resume will reconfigure before usage.
> 
> Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180")
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
> I took the liberty of fixing my own nits that I had with Taniya's
> patch, AKA:
> 
> https://lore.kernel.org/r/1602614008-2421-2-git-send-email-tdas@codeaurora.org
> 
> Changes in v2:
> - Don't needlessly have a 2nd copy of dev_pm_ops and jam it in.
> - Check the return value of pm_clk_resume()
> - l_val should be unsigned int.
> 
>   drivers/clk/qcom/lpasscorecc-sc7180.c | 23 ++++++++++++++++++++++-
>   1 file changed, 22 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
> index 228d08f5d26f..ee23eb5b9bf2 100644
> --- a/drivers/clk/qcom/lpasscorecc-sc7180.c
> +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
> @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
>   	.num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
>   };
>   
> +static int lpass_core_cc_pm_clk_resume(struct device *dev)
> +{
> +	struct regmap *regmap = dev_get_drvdata(dev);
> +	unsigned int l_val;
> +	int ret;
> +
> +	ret = pm_clk_resume(dev);
> +	if (ret)
> +		return ret;
> +
> +	/* Read PLL_L_VAL */
> +	regmap_read(regmap, 0x1004, &l_val);
> +	if (!l_val)
> +		clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
> +				&lpass_lpaaudio_dig_pll_config);
> +
> +	return 0;
> +}
> +
>   static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
>   {
>   	const struct qcom_cc_desc *desc;
> @@ -373,6 +392,8 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
>   	if (IS_ERR(regmap))
>   		return PTR_ERR(regmap);
>   
> +	dev_set_drvdata(&pdev->dev, regmap);
> +
>   	/*
>   	 * Keep the CLK always-ON
>   	 * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
> @@ -449,7 +470,7 @@ static int lpass_core_sc7180_probe(struct platform_device *pdev)
>   }
>   
>   static const struct dev_pm_ops lpass_core_cc_pm_ops = {
> -	SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
> +	SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL)

There are two devices and "lpass_hm_core" and the PLL is not part of the 
HM_CORE, thus was the reason to separate out the pm_ops.

>   };
>   
>   static struct platform_driver lpass_core_cc_sc7180_driver = {
>
Doug Anderson Oct. 14, 2020, 9:13 p.m. UTC | #3 
Hi,

On Wed, Oct 14, 2020 at 10:06 AM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Douglas Anderson (2020-10-14 08:58:24)
> > diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
> > index 228d08f5d26f..ee23eb5b9bf2 100644
> > --- a/drivers/clk/qcom/lpasscorecc-sc7180.c
> > +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
> > @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
> >         .num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
> >  };
> >
> > +static int lpass_core_cc_pm_clk_resume(struct device *dev)
> > +{
> > +       struct regmap *regmap = dev_get_drvdata(dev);
>
> Can we use dev_get_remap(dev, NULL) instead?

Good idea.  ...but as far as I can tell there are two regmaps.  I'll use

dev_get_regmap(dev, "lpass_core_cc");


> > +       unsigned int l_val;
> > +       int ret;
> > +
> > +       ret = pm_clk_resume(dev);
> > +       if (ret)
> > +               return ret;
> > +
> > +       /* Read PLL_L_VAL */
>
> Please drop this useless comment. Replace it with something like this
> (if at all):
>
>         /* Reconfigure PLL if PLL was reset across suspend */

We reconfigure more than just the PLL.  I believe that the PLL being
zero is just a clue that we use to know we should re-init the whole
thing.  I've tried to convey this in a comment in the next version.
Doug Anderson Oct. 14, 2020, 9:13 p.m. UTC | #4 
Hi,

On Wed, Oct 14, 2020 at 10:21 AM Taniya Das <tdas@codeaurora.org> wrote:
>
> Thanks Doug for the patch.
>
> On 10/14/2020 9:28 PM, Douglas Anderson wrote:
> > From: Taniya Das <tdas@codeaurora.org>
> >
> > In the case where the PLL configuration is lost, then the pm runtime
> > resume will reconfigure before usage.
> >
> > Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180")
> > Signed-off-by: Taniya Das <tdas@codeaurora.org>
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
> > I took the liberty of fixing my own nits that I had with Taniya's
> > patch, AKA:
> >
> > https://lore.kernel.org/r/1602614008-2421-2-git-send-email-tdas@codeaurora.org
> >
> > Changes in v2:
> > - Don't needlessly have a 2nd copy of dev_pm_ops and jam it in.
> > - Check the return value of pm_clk_resume()
> > - l_val should be unsigned int.
> >
> >   drivers/clk/qcom/lpasscorecc-sc7180.c | 23 ++++++++++++++++++++++-
> >   1 file changed, 22 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
> > index 228d08f5d26f..ee23eb5b9bf2 100644
> > --- a/drivers/clk/qcom/lpasscorecc-sc7180.c
> > +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
> > @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
> >       .num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
> >   };
> >
> > +static int lpass_core_cc_pm_clk_resume(struct device *dev)
> > +{
> > +     struct regmap *regmap = dev_get_drvdata(dev);
> > +     unsigned int l_val;
> > +     int ret;
> > +
> > +     ret = pm_clk_resume(dev);
> > +     if (ret)
> > +             return ret;
> > +
> > +     /* Read PLL_L_VAL */
> > +     regmap_read(regmap, 0x1004, &l_val);
> > +     if (!l_val)
> > +             clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
> > +                             &lpass_lpaaudio_dig_pll_config);
> > +
> > +     return 0;
> > +}
> > +
> >   static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
> >   {
> >       const struct qcom_cc_desc *desc;
> > @@ -373,6 +392,8 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
> >       if (IS_ERR(regmap))
> >               return PTR_ERR(regmap);
> >
> > +     dev_set_drvdata(&pdev->dev, regmap);
> > +
> >       /*
> >        * Keep the CLK always-ON
> >        * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
> > @@ -449,7 +470,7 @@ static int lpass_core_sc7180_probe(struct platform_device *pdev)
> >   }
> >
> >   static const struct dev_pm_ops lpass_core_cc_pm_ops = {
> > -     SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
> > +     SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL)
>
> There are two devices and "lpass_hm_core" and the PLL is not part of the
> HM_CORE, thus was the reason to separate out the pm_ops.

Oh, that's really weird / unexpected.  I've tried to disentangle this
in a v3 patch series so I'd be curious to see what people think.
Though it's probably fine to jam the "pm" value like your v1 did I
think it violates the "principle of least surprise" a bit.

-Doug
diff mbox series

Patch

diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
index 228d08f5d26f..ee23eb5b9bf2 100644
--- a/drivers/clk/qcom/lpasscorecc-sc7180.c
+++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
@@ -356,6 +356,25 @@  static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
 	.num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
 };
 
+static int lpass_core_cc_pm_clk_resume(struct device *dev)
+{
+	struct regmap *regmap = dev_get_drvdata(dev);
+	unsigned int l_val;
+	int ret;
+
+	ret = pm_clk_resume(dev);
+	if (ret)
+		return ret;
+
+	/* Read PLL_L_VAL */
+	regmap_read(regmap, 0x1004, &l_val);
+	if (!l_val)
+		clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
+				&lpass_lpaaudio_dig_pll_config);
+
+	return 0;
+}
+
 static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
 {
 	const struct qcom_cc_desc *desc;
@@ -373,6 +392,8 @@  static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
+	dev_set_drvdata(&pdev->dev, regmap);
+
 	/*
 	 * Keep the CLK always-ON
 	 * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
@@ -449,7 +470,7 @@  static int lpass_core_sc7180_probe(struct platform_device *pdev)
 }
 
 static const struct dev_pm_ops lpass_core_cc_pm_ops = {
-	SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
+	SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL)
 };
 
 static struct platform_driver lpass_core_cc_sc7180_driver = {