[04/12] soc: xilinx: vcu: add helper to wait for PLL locked

Message ID	20201116075532.4019252-5-m.tretter@pengutronix.de (mailing list archive)
State	Not Applicable, archived
Headers	show Return-Path: <linux-clk-owner@kernel.org> From: Michael Tretter <m.tretter@pengutronix.de> To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: rajanv@xilinx.com, tejasp@xilinx.com, dshah@xilinx.com, rvisaval@xilinx.com, michals@xilinx.com, kernel@pengutronix.de, robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, Michael Tretter <m.tretter@pengutronix.de> Date: Mon, 16 Nov 2020 08:55:24 +0100 Message-Id: <20201116075532.4019252-5-m.tretter@pengutronix.de> In-Reply-To: <20201116075532.4019252-1-m.tretter@pengutronix.de> References: <20201116075532.4019252-1-m.tretter@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [PATCH 04/12] soc: xilinx: vcu: add helper to wait for PLL locked Precedence: bulk
Series	[01/12] ARM: dts: define indexes for output clocks \| expand [01/12] ARM: dts: define indexes for output clocks [02/12] clk: divider: fix initialization with parent_hw [03/12] soc: xilinx: vcu: drop coreclk from struct xlnx_vcu [04/12] soc: xilinx: vcu: add helper to wait for PLL locked [05/12] soc: xilinx: vcu: add helpers for configuring PLL [06/12] soc: xilinx: vcu: implement PLL disable [07/12] soc: xilinx: vcu: register PLL as fixed rate clock [08/12] soc: xilinx: vcu: implement clock provider for output clocks [09/12] soc: xilinx: vcu: make pll post divider explicit [10/12] soc: xilinx: vcu: make the PLL configurable [11/12] soc: xilinx: vcu: remove calculation of PLL configuration [12/12] soc: xilinx: vcu: use bitfields for register definition

Message ID

20201116075532.4019252-5-m.tretter@pengutronix.de (mailing list archive)

State

Not Applicable, archived

Headers

From: Michael Tretter <m.tretter@pengutronix.de>
To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org
Cc: rajanv@xilinx.com, tejasp@xilinx.com, dshah@xilinx.com,
        rvisaval@xilinx.com, michals@xilinx.com, kernel@pengutronix.de,
        robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
        Michael Tretter <m.tretter@pengutronix.de>
Date: Mon, 16 Nov 2020 08:55:24 +0100
Message-Id: <20201116075532.4019252-5-m.tretter@pengutronix.de>
In-Reply-To: <20201116075532.4019252-1-m.tretter@pengutronix.de>
References: <20201116075532.4019252-1-m.tretter@pengutronix.de>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: [PATCH 04/12] soc: xilinx: vcu: add helper to wait for PLL locked
Precedence: bulk

Series

[01/12] ARM: dts: define indexes for output clocks | expand

Commit Message

Michael Tretter Nov. 16, 2020, 7:55 a.m. UTC

Extract a helper function to wait until the PLL is locked. Also,
disabling the bypass was buried in the exit path on the wait loop.
Separate the different steps and add a helper function to make the code
more readable.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/soc/xilinx/xlnx_vcu.c | 46 ++++++++++++++++++++---------------
 1 file changed, 27 insertions(+), 19 deletions(-)

diff --git a/drivers/soc/xilinx/xlnx_vcu.c b/drivers/soc/xilinx/xlnx_vcu.c
index 7da9643820a8..0fd8356a3776 100644
--- a/drivers/soc/xilinx/xlnx_vcu.c
+++ b/drivers/soc/xilinx/xlnx_vcu.c
@@ -256,6 +256,22 @@  static void xvcu_write_field_reg(void __iomem *iomem, int offset,
 	xvcu_write(iomem, offset, val);
 }
 
+static int xvcu_pll_wait_for_lock(struct xvcu_device *xvcu)
+{
+	void __iomem *base = xvcu->vcu_slcr_ba;
+	unsigned long timeout;
+	u32 lock_status;
+
+	timeout = jiffies + msecs_to_jiffies(2000);
+	do {
+		lock_status = xvcu_read(base, VCU_PLL_STATUS);
+		if (lock_status & VCU_PLL_STATUS_LOCK_STATUS_MASK)
+			return 0;
+	} while (!time_after(jiffies, timeout));
+
+	return -ETIMEDOUT;
+}
+
 /**
  * xvcu_set_vcu_pll_info - Set the VCU PLL info
  * @xvcu:	Pointer to the xvcu_device structure
@@ -428,8 +444,6 @@  static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
  */
 static int xvcu_set_pll(struct xvcu_device *xvcu)
 {
-	u32 lock_status;
-	unsigned long timeout;
 	int ret;
 
 	ret = xvcu_set_vcu_pll_info(xvcu);
@@ -447,24 +461,18 @@  static int xvcu_set_pll(struct xvcu_device *xvcu)
 	xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
 			     0, VCU_PLL_CTRL_RESET_MASK,
 			     VCU_PLL_CTRL_RESET_SHIFT);
-	/*
-	 * Defined the timeout for the max time to wait the
-	 * PLL_STATUS to be locked.
-	 */
-	timeout = jiffies + msecs_to_jiffies(2000);
-	do {
-		lock_status = xvcu_read(xvcu->vcu_slcr_ba, VCU_PLL_STATUS);
-		if (lock_status & VCU_PLL_STATUS_LOCK_STATUS_MASK) {
-			xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
-					     0, VCU_PLL_CTRL_BYPASS_MASK,
-					     VCU_PLL_CTRL_BYPASS_SHIFT);
-			return 0;
-		}
-	} while (!time_after(jiffies, timeout));
 
-	/* PLL is not locked even after the timeout of the 2sec */
-	dev_err(xvcu->dev, "PLL is not locked\n");
-	return -ETIMEDOUT;
+	ret = xvcu_pll_wait_for_lock(xvcu);
+	if (ret) {
+		dev_err(xvcu->dev, "PLL is not locked\n");
+		return ret;
+	}
+
+	xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
+			     0, VCU_PLL_CTRL_BYPASS_MASK,
+			     VCU_PLL_CTRL_BYPASS_SHIFT);
+
+	return ret;
 }
 
 /**

[04/12] soc: xilinx: vcu: add helper to wait for PLL locked

Commit Message

Patch