| Message ID | 20201210102234.2.I26dcc0cee374f5571d9929c9985f463773167e68@changeid (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [1/2] clk: qcom: gcc-sc7180: Use floor ops for sdcc clks | expand |
On Thu 10 Dec 12:22 CST 2020, Douglas Anderson wrote: > 50 MHz is an incredibly common clock rate for SD cards to run at. > It's "high speed" mode in SD (not very fast these days, but it used to > be) or: > #define HIGH_SPEED_MAX_DTR 50000000 > > If we don't support this then older "high speed" cards can only run at > 25 MHz or at half their normal speed. There doesn't seem to be any > reason to skip this clock rate, so add it. > > Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180") > Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > > drivers/clk/qcom/gcc-sc7180.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c > index b080739ab0c3..d82d725ac231 100644 > --- a/drivers/clk/qcom/gcc-sc7180.c > +++ b/drivers/clk/qcom/gcc-sc7180.c > @@ -651,6 +651,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { > F(9600000, P_BI_TCXO, 2, 0, 0), > F(19200000, P_BI_TCXO, 1, 0, 0), > F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), > + F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), > F(100000000, P_GPLL0_OUT_EVEN, 3, 0, 0), > F(202000000, P_GPLL7_OUT_MAIN, 4, 0, 0), > { } > -- > 2.29.2.576.ga3fc446d84-goog >
Quoting Douglas Anderson (2020-12-10 10:22:39) > 50 MHz is an incredibly common clock rate for SD cards to run at. > It's "high speed" mode in SD (not very fast these days, but it used to > be) or: > #define HIGH_SPEED_MAX_DTR 50000000 > > If we don't support this then older "high speed" cards can only run at > 25 MHz or at half their normal speed. There doesn't seem to be any > reason to skip this clock rate, so add it. > > Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180") > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index b080739ab0c3..d82d725ac231 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -651,6 +651,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { F(9600000, P_BI_TCXO, 2, 0, 0), F(19200000, P_BI_TCXO, 1, 0, 0), F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), + F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), F(100000000, P_GPLL0_OUT_EVEN, 3, 0, 0), F(202000000, P_GPLL7_OUT_MAIN, 4, 0, 0), { }
50 MHz is an incredibly common clock rate for SD cards to run at. It's "high speed" mode in SD (not very fast these days, but it used to be) or: #define HIGH_SPEED_MAX_DTR 50000000 If we don't support this then older "high speed" cards can only run at 25 MHz or at half their normal speed. There doesn't seem to be any reason to skip this clock rate, so add it. Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180") Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/clk/qcom/gcc-sc7180.c | 1 + 1 file changed, 1 insertion(+)