@@ -102,38 +102,6 @@
interrupt-parent = <&intc>;
};
- clocks {
- clk_hse: clk-hse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- };
-
- clk_hsi: clk-hsi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <64000000>;
- };
-
- clk_lse: clk-lse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- };
-
- clk_lsi: clk-lsi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32000>;
- };
-
- clk_csi: clk-csi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <4000000>;
- };
- };
-
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
@@ -595,7 +563,7 @@
compatible = "st,stm32-cec";
reg = <0x40016000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc CEC_K>, <&clk_lse>;
+ clocks = <&rcc CEC_K>, <&scmi0_clk CK_SCMI0_LSE>;
clock-names = "cec", "hdmi-cec";
status = "disabled";
};
@@ -1156,10 +1124,17 @@
};
rcc: rcc@50000000 {
- compatible = "st,stm32mp1-rcc", "syscon";
+ compatible = "st,stm32mp1-rcc-secure", "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+
+ clock-names = "hse", "hsi", "csi", "lse", "lsi";
+ clocks = <&scmi0_clk CK_SCMI0_HSE>,
+ <&scmi0_clk CK_SCMI0_HSI>,
+ <&scmi0_clk CK_SCMI0_CSI>,
+ <&scmi0_clk CK_SCMI0_LSE>,
+ <&scmi0_clk CK_SCMI0_LSI>;
};
pwr_regulators: pwr@50001000 {
@@ -1342,8 +1317,8 @@
compatible = "st,stm32f756-hash";
reg = <0x54002000 0x400>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc HASH1>;
- resets = <&rcc HASH1_R>;
+ clocks = <&scmi0_clk CK_SCMI0_HASH1>;
+ resets = <&scmi0_reset RST_SCMI0_HASH1>;
dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>;
dma-names = "in";
dma-maxburst = <2>;
@@ -1353,8 +1328,8 @@
rng1: rng@54003000 {
compatible = "st,stm32-rng";
reg = <0x54003000 0x400>;
- clocks = <&rcc RNG1_K>;
- resets = <&rcc RNG1_R>;
+ clocks = <&scmi0_clk CK_SCMI0_RNG1>;
+ resets = <&scmi0_reset RST_SCMI0_RNG1>;
status = "disabled";
};
@@ -1363,7 +1338,7 @@
reg = <0x58000000 0x1000>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc MDMA>;
- resets = <&rcc MDMA_R>;
+ resets = <&scmi0_reset RST_SCMI0_MDMA>;
#dma-cells = <5>;
dma-channels = <32>;
dma-requests = <48>;
@@ -1524,7 +1499,7 @@
iwdg2: watchdog@5a002000 {
compatible = "st,stm32mp1-iwdg";
reg = <0x5a002000 0x400>;
- clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
+ clocks = <&rcc IWDG2>, <&scmi0_clk CK_SCMI0_LSI>;
clock-names = "pclk", "lsi";
status = "disabled";
};
@@ -1553,7 +1528,8 @@
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc USART1_K>;
+ clocks = <&scmi0_clk CK_SCMI0_USART1>;
+ resets = <&scmi0_reset RST_SCMI0_USART1>;
status = "disabled";
};
@@ -1563,8 +1539,8 @@
compatible = "st,stm32h7-spi";
reg = <0x5c001000 0x400>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI6_K>;
- resets = <&rcc SPI6_R>;
+ clocks = <&scmi0_clk CK_SCMI0_SPI6>;
+ resets = <&scmi0_reset RST_SCMI0_SPI6>;
dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>,
<&mdma1 35 0x0 0x40002 0x0 0x0>;
dma-names = "rx", "tx";
@@ -1577,8 +1553,8 @@
interrupt-names = "event", "error";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C4_K>;
- resets = <&rcc I2C4_R>;
+ clocks = <&scmi0_clk CK_SCMI0_I2C4>;
+ resets = <&scmi0_reset RST_SCMI0_I2C4>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x8>;
@@ -1589,7 +1565,8 @@
rtc: rtc@5c004000 {
compatible = "st,stm32mp1-rtc";
reg = <0x5c004000 0x400>;
- clocks = <&rcc RTCAPB>, <&rcc RTC>;
+ clocks = <&scmi0_clk CK_SCMI0_RTCAPB>,
+ <&scmi0_clk CK_SCMI0_RTC>;
clock-names = "pclk", "rtc_ck";
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -1614,8 +1591,8 @@
interrupt-names = "event", "error";
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C6_K>;
- resets = <&rcc I2C6_R>;
+ clocks = <&scmi0_clk CK_SCMI0_I2C6>;
+ resets = <&scmi0_reset RST_SCMI0_I2C6>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x20>;
@@ -1778,7 +1755,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x400>;
- clocks = <&rcc GPIOZ>;
+ clocks = <&scmi0_clk CK_SCMI0_GPIOZ>;
st,bank-name = "GPIOZ";
st,bank-ioport = <11>;
status = "disabled";
@@ -1800,7 +1777,7 @@
reg = <0x10000000 0x40000>,
<0x30000000 0x40000>,
<0x38000000 0x10000>;
- resets = <&rcc MCU_R>;
+ resets = <&scmi0_reset RST_SCMI0_MCU>;
st,syscfg-holdboot = <&rcc 0x10C 0x1>;
st,syscfg-tz = <&rcc 0x000 0x1>;
st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
@@ -30,7 +30,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
- clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
+ clocks = <&scmi0_clk CK_SCMI0_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
status = "disabled";
@@ -43,7 +43,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
- clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
+ clocks = <&scmi0_clk CK_SCMI0_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
@@ -20,7 +20,7 @@
dsi: dsi@5a000000 {
compatible = "st,stm32-dsi";
reg = <0x5a000000 0x800>;
- clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
+ clocks = <&rcc DSI_K>, <&scmi0_clk CK_SCMI0_HSE>, <&rcc DSI_PX>;
clock-names = "pclk", "ref", "px_clk";
resets = <&rcc DSI_R>;
reset-names = "apb";
@@ -10,8 +10,8 @@
compatible = "st,stm32mp1-cryp";
reg = <0x54001000 0x400>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc CRYP1>;
- resets = <&rcc CRYP1_R>;
+ clocks = <&scmi0_clk CK_SCMI0_CRYP1>;
+ resets = <&scmi0_reset RST_SCMI0_CRYP1>;
status = "disabled";
};
};