From patchwork Wed Mar 31 20:16:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alain Volmat X-Patchwork-Id: 12176307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC22CC433B4 for ; Wed, 31 Mar 2021 21:02:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7238661056 for ; Wed, 31 Mar 2021 21:02:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229787AbhCaVCT (ORCPT ); Wed, 31 Mar 2021 17:02:19 -0400 Received: from st43p00im-zteg10072001.me.com ([17.58.63.167]:42848 "EHLO st43p00im-zteg10072001.me.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236476AbhCaURG (ORCPT ); Wed, 31 Mar 2021 16:17:06 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=me.com; s=1a1hai; t=1617221821; bh=qyZanw9bvq4XzKEGum+SixXhJ4fFKKUpQPcyblgNRAY=; h=From:To:Subject:Date:Message-Id; b=Igf3xduE4CAL6VrBmOoT4WY4+46Kl+SngAtm1RZ3hZ6Okx8Q3G0L+VA3lK5ghNVD2 hJzR6BB5K8QjcuqhblpYYXEd4jkE6jMANEEsMdgXQxm/ybjqNU9Q2UnK84O6LvCXTi OtjqnpmrcnzW0NXyzU/FzpNJd4CghQsOBMDkQO490bTp1KXBn7yc7Sl4xkqIv7ZiNs Lnjmvjey3paJWXCuDSqzu+F0zmOnlqdAxs7LbRQmUJDrQLGmCtANyigHmzx2jMO+Na toQ4gzpGLB/TALPyIk+S3GLtvx8JTAQoHDvhaEmF8BDlnRczlPLq0VvEXcpkl4t+bX ubkUxv7q3MdfQ== Received: from localhost (101.220.150.77.rev.sfr.net [77.150.220.101]) by st43p00im-zteg10072001.me.com (Postfix) with ESMTPSA id 4F670C013A; Wed, 31 Mar 2021 20:17:00 +0000 (UTC) From: Alain Volmat To: Michael Turquette , Stephen Boyd , Rob Herring , Patrice Chotard Cc: Lee Jones , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alain Volmat Subject: [PATCH v4 3/7] dt-bindings: clock: st: flexgen: add new introduced compatible Date: Wed, 31 Mar 2021 22:16:28 +0200 Message-Id: <20210331201632.24530-4-avolmat@me.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210331201632.24530-1-avolmat@me.com> References: <20210331201632.24530-1-avolmat@me.com> X-Proofpoint-Virus-Version: =?utf-8?q?vendor=3Dfsecure_engine=3D1=2E1=2E170-?= =?utf-8?q?22c6f66c430a71ce266a39bfe25bc2903e8d5c8f=3A6=2E0=2E369=2C18=2E0?= =?utf-8?q?=2E761=2C17=2E0=2E607=2E475=2E0000000_definitions=3D2021-03-31=5F?= =?utf-8?q?08=3A2021-03-31=5F02=2C2021-03-31=5F08=2C2020-04-07=5F01_signatur?= =?utf-8?q?es=3D0?= X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 malwarescore=0 mlxlogscore=999 adultscore=0 spamscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103310140 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org New compatible are added, supporting various kind of flexgen in STiH407, STiH410 and STiH418 Signed-off-by: Alain Volmat Acked-by: Rob Herring --- .../devicetree/bindings/clock/st/st,flexgen.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/st/st,flexgen.txt b/Documentation/devicetree/bindings/clock/st/st,flexgen.txt index 7ff77fc57dff..55a18939bddd 100644 --- a/Documentation/devicetree/bindings/clock/st/st,flexgen.txt +++ b/Documentation/devicetree/bindings/clock/st/st,flexgen.txt @@ -64,6 +64,16 @@ Required properties: audio use case) "st,flexgen-video", "st,flexgen" (enable clock propagation on parent and activate synchronous mode) + "st,flexgen-stih407-a0" + "st,flexgen-stih410-a0" + "st,flexgen-stih407-c0" + "st,flexgen-stih410-c0" + "st,flexgen-stih418-c0" + "st,flexgen-stih407-d0" + "st,flexgen-stih410-d0" + "st,flexgen-stih407-d2" + "st,flexgen-stih418-d2" + "st,flexgen-stih407-d3" - #clock-cells : from common clock binding; shall be set to 1 (multiple clock outputs).