Message ID | 20210604090943.3519350-8-aisheng.dong@nxp.com (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show
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Fri, 4 Jun 2021 09:11:13 +0000 From: Dong Aisheng <aisheng.dong@nxp.com> To: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sboyd@kernel.org, dongas86@gmail.com, shawnguo@kernel.org, kernel@pengutronix.de, abel.vesa@nxp.com, Anson Huang <Anson.Huang@nxp.com>, Dong Aisheng <aisheng.dong@nxp.com> Subject: [PATCH 07/10] clk: imx: scu: Add A72 frequency scaling support Date: Fri, 4 Jun 2021 17:09:40 +0800 Message-Id: <20210604090943.3519350-8-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604090943.3519350-1-aisheng.dong@nxp.com> References: <20210604090943.3519350-1-aisheng.dong@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR0601CA0010.apcprd06.prod.outlook.com (2603:1096:3::20) To DB9PR04MB8477.eurprd04.prod.outlook.com (2603:10a6:10:2c3::11) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR0601CA0010.apcprd06.prod.outlook.com (2603:1096:3::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.24 via Frontend Transport; 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clk: imx: scu: add more scu clock features
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diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c index 8b3eb58e6d12..9f7ad3ca1039 100644 --- a/drivers/clk/imx/clk-scu.c +++ b/drivers/clk/imx/clk-scu.c @@ -275,6 +275,8 @@ static int clk_scu_atf_set_cpu_rate(struct clk_hw *hw, unsigned long rate, if (clk->rsrc_id == IMX_SC_R_A35 || clk->rsrc_id == IMX_SC_R_A53) cluster_id = 0; + else if (clk->rsrc_id == IMX_SC_R_A72) + cluster_id = 1; else return -EINVAL; @@ -449,7 +451,7 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name, init.name = name; init.ops = &clk_scu_ops; - if (rsrc_id == IMX_SC_R_A35 || rsrc_id == IMX_SC_R_A53) + if (rsrc_id == IMX_SC_R_A35 || rsrc_id == IMX_SC_R_A53 || rsrc_id == IMX_SC_R_A72) init.ops = &clk_scu_cpu_ops; else if (rsrc_id == IMX_SC_R_PI_0_PLL) init.ops = &clk_scu_pi_ops;