diff mbox series

[RESEND,v2,9/9] clk: qcom: gcc-msm8994: Add a quirk for a different SDCC configuration

Message ID 20210829193617.4105-9-konrad.dybcio@somainline.org (mailing list archive)
State Changes Requested, archived
Headers show
Series [RESEND,v2,1/9] dt-bindings: clk: qcom: Add bindings for MSM8994 GCC driver | expand

Commit Message

Konrad Dybcio Aug. 29, 2021, 7:36 p.m. UTC
Some devices come with a different SDCC clock configuration,
account for that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 .../bindings/clock/qcom,gcc-msm8994.yaml         |  4 ++++
 drivers/clk/qcom/gcc-msm8994.c                   | 16 ++++++++++++++++
 2 files changed, 20 insertions(+)

Comments

Stephen Boyd Aug. 29, 2021, 7:50 p.m. UTC | #1
Quoting Konrad Dybcio (2021-08-29 12:36:16)
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> index b44a844d894c..4ba2f72d3cad 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> @@ -49,6 +49,10 @@ properties:
>      description:
>        Protected clock specifier list as per common clock binding.
>  
> +  qcom,sdcc2-clk-src-40mhz:
> +    description: SDCC2_APPS clock source runs at 40MHz.
> +    type: boolean
> +
>  required:
>    - compatible
>    - reg
> diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
> index 72038e4c04df..55c0fd069640 100644
> --- a/drivers/clk/qcom/gcc-msm8994.c
> +++ b/drivers/clk/qcom/gcc-msm8994.c
> @@ -1012,6 +1012,19 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
>         },
>  };
>  
> +static struct freq_tbl ftbl_sdcc2_40mhz_apps_clk_src[] = {
> +       F(144000, P_XO, 16, 3, 25),
> +       F(400000, P_XO, 12, 1, 4),
> +       F(20000000, P_GPLL0, 15, 1, 2),
> +       F(25000000, P_GPLL0, 12, 1, 2),
> +       F(40000000, P_GPLL0, 15, 0, 0),
> +       F(50000000, P_GPLL0, 12, 0, 0),
> +       F(80000000, P_GPLL0, 7.5, 0, 0),
> +       F(100000000, P_GPLL0, 6, 0, 0),
> +       F(200000000, P_GPLL0, 3, 0, 0),

It should work to add more frequencies to the existing table. The
consumer will need to pick the correct frequency. That can be achieved
with an OPP table if necessary, in the consumer node.

> +       { }
> +};
> +
>  static struct freq_tbl ftbl_sdcc2_4_apps_clk_src[] = {
>         F(144000, P_XO, 16, 3, 25),
>         F(400000, P_XO, 12, 1, 4),
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
index b44a844d894c..4ba2f72d3cad 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
@@ -49,6 +49,10 @@  properties:
     description:
       Protected clock specifier list as per common clock binding.
 
+  qcom,sdcc2-clk-src-40mhz:
+    description: SDCC2_APPS clock source runs at 40MHz.
+    type: boolean
+
 required:
   - compatible
   - reg
diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
index 72038e4c04df..55c0fd069640 100644
--- a/drivers/clk/qcom/gcc-msm8994.c
+++ b/drivers/clk/qcom/gcc-msm8994.c
@@ -1012,6 +1012,19 @@  static struct clk_rcg2 sdcc1_apps_clk_src = {
 	},
 };
 
+static struct freq_tbl ftbl_sdcc2_40mhz_apps_clk_src[] = {
+	F(144000, P_XO, 16, 3, 25),
+	F(400000, P_XO, 12, 1, 4),
+	F(20000000, P_GPLL0, 15, 1, 2),
+	F(25000000, P_GPLL0, 12, 1, 2),
+	F(40000000, P_GPLL0, 15, 0, 0),
+	F(50000000, P_GPLL0, 12, 0, 0),
+	F(80000000, P_GPLL0, 7.5, 0, 0),
+	F(100000000, P_GPLL0, 6, 0, 0),
+	F(200000000, P_GPLL0, 3, 0, 0),
+	{ }
+};
+
 static struct freq_tbl ftbl_sdcc2_4_apps_clk_src[] = {
 	F(144000, P_XO, 16, 3, 25),
 	F(400000, P_XO, 12, 1, 4),
@@ -2788,6 +2801,9 @@  static int gcc_msm8994_probe(struct platform_device *pdev)
 		gcc_msm8994_desc.clks[GCC_SYS_NOC_UFS_AXI_CLK] = NULL;
 	}
 
+	if (of_find_property(dev->of_node, "qcom,sdcc2-clk-src-40mhz", NULL))
+		sdcc2_apps_clk_src.freq_tbl = ftbl_sdcc2_40mhz_apps_clk_src;
+
 	return qcom_cc_probe(pdev, &gcc_msm8994_desc);
 }