| Message ID | 20211125062036.1185994-2-AjitKumar.Pandey@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | x86: clk: clk-fch: Enhanced 48Mhz fixed clk support | expand |
Hi Ajit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on clk/clk-next]
[also build test WARNING on rafael-pm/linux-next linus/master v5.16-rc2 next-20211125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Ajit-Kumar-Pandey/x86-clk-clk-fch-Enhanced-48Mhz-fixed-clk-support/20211125-142523
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20211125/202111252001.0psIb0sd-lkp@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ad72f6072b56c2ad466eef386eca2d1a8ba48e2d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Ajit-Kumar-Pandey/x86-clk-clk-fch-Enhanced-48Mhz-fixed-clk-support/20211125-142523
git checkout ad72f6072b56c2ad466eef386eca2d1a8ba48e2d
# save the config file to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/clk/x86/clk-fch.c: In function 'fch_clk_remove':
>> drivers/clk/x86/clk-fch.c:97:23: warning: variable 'fch_data' set but not used [-Wunused-but-set-variable]
97 | struct fch_clk_data *fch_data;
| ^~~~~~~~
vim +/fch_data +97 drivers/clk/x86/clk-fch.c
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 93
d9b77361c1a5155 drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 94 static int fch_clk_remove(struct platform_device *pdev)
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 95 {
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 96 int i, clks;
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 @97 struct fch_clk_data *fch_data;
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 98 struct pci_dev *fch_dev;
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 99
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 100 fch_data = dev_get_platdata(&pdev->dev);
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 101
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 102 fch_dev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 103 if (!fch_dev)
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 104 return -ENODEV;
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 105
ad72f6072b56c2a drivers/clk/x86/clk-fch.c Ajit Kumar Pandey 2021-11-25 106 clks = pci_match_id(fch_pci_ids, fch_dev) ? CLK_MAX_FIXED : ST_MAX_CLKS;
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 107
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 108 for (i = 0; i < clks; i++)
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 109 clk_hw_unregister(hws[i]);
19fe87fd854a92c drivers/clk/x86/clk-fch.c Akshu Agrawal 2020-07-31 110
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 111 return 0;
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 112 }
421bf6a1f061a6e drivers/clk/x86/clk-st.c Akshu Agrawal 2018-05-09 113
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/drivers/clk/x86/clk-fch.c b/drivers/clk/x86/clk-fch.c index 8f7c5142b0f0..df59fa8ac0a4 100644 --- a/drivers/clk/x86/clk-fch.c +++ b/drivers/clk/x86/clk-fch.c @@ -8,6 +8,7 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/clk-provider.h> +#include <linux/pci.h> #include <linux/platform_data/clk-fch.h> #include <linux/platform_device.h> @@ -26,22 +27,37 @@ #define ST_CLK_GATE 3 #define ST_MAX_CLKS 4 -#define RV_CLK_48M 0 -#define RV_CLK_GATE 1 -#define RV_MAX_CLKS 2 +#define CLK_48M_FIXED 0 +#define CLK_GATE_FIXED 1 +#define CLK_MAX_FIXED 2 + +/* List of supported CPU ids for fixed clk */ +#define AMD_CPU_ID_RV 0x15D0 static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" }; static struct clk_hw *hws[ST_MAX_CLKS]; +static const struct pci_device_id fch_pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RV) }, + { } +}; + static int fch_clk_probe(struct platform_device *pdev) { struct fch_clk_data *fch_data; + struct pci_dev *fch_dev; fch_data = dev_get_platdata(&pdev->dev); if (!fch_data || !fch_data->base) return -EINVAL; - if (!fch_data->is_rv) { + fch_dev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); + if (!fch_dev) { + dev_err(&pdev->dev, "FCH device not found\n"); + return -ENODEV; + } + + if (!pci_match_id(fch_pci_ids, fch_dev)) { hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, 48000000); hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", @@ -61,14 +77,14 @@ static int fch_clk_probe(struct platform_device *pdev) devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], "oscout1", NULL); } else { - hws[RV_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", + hws[CLK_48M_FIXED] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, 48000000); - hws[RV_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", + hws[CLK_GATE_FIXED] = clk_hw_register_gate(NULL, "oscout1", "clk48MHz", 0, fch_data->base + MISCCLKCNTL1, OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL); - devm_clk_hw_register_clkdev(&pdev->dev, hws[RV_CLK_GATE], + devm_clk_hw_register_clkdev(&pdev->dev, hws[CLK_GATE_FIXED], "oscout1", NULL); } @@ -79,10 +95,15 @@ static int fch_clk_remove(struct platform_device *pdev) { int i, clks; struct fch_clk_data *fch_data; + struct pci_dev *fch_dev; fch_data = dev_get_platdata(&pdev->dev); - clks = fch_data->is_rv ? RV_MAX_CLKS : ST_MAX_CLKS; + fch_dev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); + if (!fch_dev) + return -ENODEV; + + clks = pci_match_id(fch_pci_ids, fch_dev) ? CLK_MAX_FIXED : ST_MAX_CLKS; for (i = 0; i < clks; i++) clk_hw_unregister(hws[i]);
FCH controller clock configuration slightly differs across AMD's SOC architectures. Newer family of SOC only support a 48MHz fixed clock while older family has a clk_mux to choose 48MHz and 25MHz. At present fixed clk support is only enabled for RV architecture using "is-rv" device property initialized from boot loader. This limit 48MHz fixed clock gate support to RV platform unless we add similar device property in boot loader for other architecture. Add pci_device_id table with Raven platform id and replace "is-rv" device property check with pci id match to support 48MHz fixed clk support. This enhanced flexibility to enable fixed 48MHz fch clock framework on other architectures by simply adding new entries into pci_device_id table. Also replace RV with FIXED as generic naming convention across all platforms. Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> --- drivers/clk/x86/clk-fch.c | 37 +++++++++++++++++++++++++++++-------- 1 file changed, 29 insertions(+), 8 deletions(-)