diff mbox series

clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1

Message ID 20211130212015.25232-1-martin.botka@somainline.org (mailing list archive)
State Accepted, archived
Headers show
Series clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1 | expand

Commit Message

Martin Botka Nov. 30, 2021, 9:20 p.m. UTC
Without this change eMMC runs at overclocked freq.
Swap the ops to not OC the eMMC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
---
 drivers/clk/qcom/gcc-sm6125.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Stephen Boyd Dec. 3, 2021, 1:03 a.m. UTC | #1
Quoting Martin Botka (2021-11-30 13:20:15)
> Without this change eMMC runs at overclocked freq.
> Swap the ops to not OC the eMMC.
> 
> Signed-off-by: Martin Botka <martin.botka@somainline.org>
> ---

Any Fixes tag?

>  drivers/clk/qcom/gcc-sm6125.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm6125.c b/drivers/clk/qcom/gcc-sm6125.c
> index 543cfab7561f..431b55bb0d2f 100644
> --- a/drivers/clk/qcom/gcc-sm6125.c
> +++ b/drivers/clk/qcom/gcc-sm6125.c
> @@ -1121,7 +1121,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
>                 .name = "gcc_sdcc1_apps_clk_src",
>                 .parent_data = gcc_parent_data_1,
>                 .num_parents = ARRAY_SIZE(gcc_parent_data_1),
> -               .ops = &clk_rcg2_ops,
> +               .ops = &clk_rcg2_floor_ops,
>         },
>  };
>  
> @@ -1143,7 +1143,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
>                 .name = "gcc_sdcc1_ice_core_clk_src",
>                 .parent_data = gcc_parent_data_0,
>                 .num_parents = ARRAY_SIZE(gcc_parent_data_0),
> -               .ops = &clk_rcg2_floor_ops,
> +               .ops = &clk_rcg2_ops,
>         },
>  };
>  
> -- 
> 2.34.0
>
Bjorn Andersson Dec. 3, 2021, 4:09 p.m. UTC | #2
On Tue 30 Nov 15:20 CST 2021, Martin Botka wrote:

> Without this change eMMC runs at overclocked freq.
> Swap the ops to not OC the eMMC.
> 
> Signed-off-by: Martin Botka <martin.botka@somainline.org>

Fixes: 4b8d6ae57cdf ("clk: qcom: Add SM6125 (TRINKET) GCC driver")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  drivers/clk/qcom/gcc-sm6125.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm6125.c b/drivers/clk/qcom/gcc-sm6125.c
> index 543cfab7561f..431b55bb0d2f 100644
> --- a/drivers/clk/qcom/gcc-sm6125.c
> +++ b/drivers/clk/qcom/gcc-sm6125.c
> @@ -1121,7 +1121,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
>  		.name = "gcc_sdcc1_apps_clk_src",
>  		.parent_data = gcc_parent_data_1,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_1),
> -		.ops = &clk_rcg2_ops,
> +		.ops = &clk_rcg2_floor_ops,
>  	},
>  };
>  
> @@ -1143,7 +1143,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
>  		.name = "gcc_sdcc1_ice_core_clk_src",
>  		.parent_data = gcc_parent_data_0,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
> -		.ops = &clk_rcg2_floor_ops,
> +		.ops = &clk_rcg2_ops,
>  	},
>  };
>  
> -- 
> 2.34.0
>
Stephen Boyd Dec. 6, 2021, 10:41 p.m. UTC | #3
Quoting Martin Botka (2021-11-30 13:20:15)
> Without this change eMMC runs at overclocked freq.
> Swap the ops to not OC the eMMC.
> 
> Signed-off-by: Martin Botka <martin.botka@somainline.org>
> ---

Applied to clk-fixes
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sm6125.c b/drivers/clk/qcom/gcc-sm6125.c
index 543cfab7561f..431b55bb0d2f 100644
--- a/drivers/clk/qcom/gcc-sm6125.c
+++ b/drivers/clk/qcom/gcc-sm6125.c
@@ -1121,7 +1121,7 @@  static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
 		.name = "gcc_sdcc1_apps_clk_src",
 		.parent_data = gcc_parent_data_1,
 		.num_parents = ARRAY_SIZE(gcc_parent_data_1),
-		.ops = &clk_rcg2_ops,
+		.ops = &clk_rcg2_floor_ops,
 	},
 };
 
@@ -1143,7 +1143,7 @@  static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
 		.name = "gcc_sdcc1_ice_core_clk_src",
 		.parent_data = gcc_parent_data_0,
 		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
-		.ops = &clk_rcg2_floor_ops,
+		.ops = &clk_rcg2_ops,
 	},
 };