diff mbox series

[3/8] clk: qcom: gcc: Add PCIe, EMAC and UFS GDSCs for SM8150

Message ID 20220126221725.710167-4-bhupesh.sharma@linaro.org (mailing list archive)
State Changes Requested, archived
Headers show
Series Add ethernet support for Qualcomm SA8155p-ADP board | expand

Commit Message

Bhupesh Sharma Jan. 26, 2022, 10:17 p.m. UTC 
This adds the PCIe, EMAC and UFS GDSC structures for
SM8150. The GDSC will allow the respective system to be
brought out of reset.

Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 drivers/clk/qcom/gcc-sm8150.c               | 74 +++++++++++++++++----
 include/dt-bindings/clock/qcom,gcc-sm8150.h |  9 ++-
 2 files changed, 69 insertions(+), 14 deletions(-)

Comments

Bjorn Andersson Feb. 1, 2022, 12:09 a.m. UTC | #1 
On Wed 26 Jan 16:17 CST 2022, Bhupesh Sharma wrote:

> This adds the PCIe, EMAC and UFS GDSC structures for
> SM8150. The GDSC will allow the respective system to be
> brought out of reset.
> 
> Cc: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  drivers/clk/qcom/gcc-sm8150.c               | 74 +++++++++++++++++----
>  include/dt-bindings/clock/qcom,gcc-sm8150.h |  9 ++-
>  2 files changed, 69 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
> index 245794485719..ada755ad55f7 100644
> --- a/drivers/clk/qcom/gcc-sm8150.c
> +++ b/drivers/clk/qcom/gcc-sm8150.c
> @@ -3448,22 +3448,67 @@ static struct clk_branch gcc_video_xo_clk = {
>  	},
>  };
>  
> +static struct gdsc emac_gdsc = {
> +	.gdscr = 0x6004,
> +	.pd = {
> +		.name = "emac_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
> +};
> +
> +static struct gdsc pcie_0_gdsc = {
> +	.gdscr = 0x6b004,
> +	.pd = {
> +		.name = "pcie_0_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
> +};
> +
> +static struct gdsc pcie_1_gdsc = {
> +	.gdscr = 0x8d004,
> +	.pd = {
> +		.name = "pcie_1_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
> +};
> +
> +static struct gdsc ufs_card_gdsc = {
> +	.gdscr = 0x75004,
> +	.pd = {
> +		.name = "ufs_card_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
> +};
> +
> +static struct gdsc ufs_phy_gdsc = {
> +	.gdscr = 0x77004,
> +	.pd = {
> +		.name = "ufs_phy_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
> +};
> +
>  static struct gdsc usb30_prim_gdsc = {
> -		.gdscr = 0xf004,
> -		.pd = {
> -			.name = "usb30_prim_gdsc",
> -		},
> -		.pwrsts = PWRSTS_OFF_ON,
> -		.flags = POLL_CFG_GDSCR,
> +	.gdscr = 0xf004,
> +	.pd = {
> +		.name = "usb30_prim_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
>  };
>  
>  static struct gdsc usb30_sec_gdsc = {
> -		.gdscr = 0x10004,
> -		.pd = {
> -			.name = "usb30_sec_gdsc",
> -		},
> -		.pwrsts = PWRSTS_OFF_ON,
> -		.flags = POLL_CFG_GDSCR,
> +	.gdscr = 0x10004,
> +	.pd = {
> +		.name = "usb30_sec_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR,
>  };
>  
>  static struct clk_regmap *gcc_sm8150_clocks[] = {
> @@ -3714,6 +3759,11 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
>  };
>  
>  static struct gdsc *gcc_sm8150_gdscs[] = {
> +	[EMAC_GDSC] = &emac_gdsc,
> +	[PCIE_0_GDSC] = &pcie_0_gdsc,
> +	[PCIE_1_GDSC] = &pcie_1_gdsc,
> +	[UFS_CARD_GDSC] = &ufs_card_gdsc,
> +	[UFS_PHY_GDSC] = &ufs_phy_gdsc,
>  	[USB30_PRIM_GDSC] = &usb30_prim_gdsc,
>  	[USB30_SEC_GDSC] = &usb30_sec_gdsc,
>  };
> diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> index 3e1a91876610..35d80ae411a0 100644
> --- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
> +++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> @@ -241,7 +241,12 @@
>  #define GCC_USB_PHY_CFG_AHB2PHY_BCR				28
>  
>  /* GCC GDSCRs */
> -#define USB30_PRIM_GDSC                     4
> -#define USB30_SEC_GDSC						5

These constants goes into .dtb files as numbers (4 and 5), changing them
will cause annoying-to-debug bugs in the transition while people still
are testing a new kernel with last weeks dtb.

So please add the new constants without affecting these numbers.

Rest looks good.

Regards,
Bjorn

> +#define EMAC_GDSC						0
> +#define PCIE_0_GDSC						1
> +#define	PCIE_1_GDSC						2
> +#define UFS_CARD_GDSC						3
> +#define UFS_PHY_GDSC						4
> +#define USB30_PRIM_GDSC						5
> +#define USB30_SEC_GDSC						6
>  
>  #endif
> -- 
> 2.34.1
>
Bhupesh Sharma March 1, 2022, 7:33 p.m. UTC | #2 
Hi Bjorn,

On Tue, 1 Feb 2022 at 05:39, Bjorn Andersson <bjorn.andersson@linaro.org> wrote:
>
> On Wed 26 Jan 16:17 CST 2022, Bhupesh Sharma wrote:
>
> > This adds the PCIe, EMAC and UFS GDSC structures for
> > SM8150. The GDSC will allow the respective system to be
> > brought out of reset.
> >
> > Cc: Stephen Boyd <sboyd@kernel.org>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  drivers/clk/qcom/gcc-sm8150.c               | 74 +++++++++++++++++----
> >  include/dt-bindings/clock/qcom,gcc-sm8150.h |  9 ++-
> >  2 files changed, 69 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
> > index 245794485719..ada755ad55f7 100644
> > --- a/drivers/clk/qcom/gcc-sm8150.c
> > +++ b/drivers/clk/qcom/gcc-sm8150.c
> > @@ -3448,22 +3448,67 @@ static struct clk_branch gcc_video_xo_clk = {
> >       },
> >  };
> >
> > +static struct gdsc emac_gdsc = {
> > +     .gdscr = 0x6004,
> > +     .pd = {
> > +             .name = "emac_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> > +};
> > +
> > +static struct gdsc pcie_0_gdsc = {
> > +     .gdscr = 0x6b004,
> > +     .pd = {
> > +             .name = "pcie_0_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> > +};
> > +
> > +static struct gdsc pcie_1_gdsc = {
> > +     .gdscr = 0x8d004,
> > +     .pd = {
> > +             .name = "pcie_1_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> > +};
> > +
> > +static struct gdsc ufs_card_gdsc = {
> > +     .gdscr = 0x75004,
> > +     .pd = {
> > +             .name = "ufs_card_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> > +};
> > +
> > +static struct gdsc ufs_phy_gdsc = {
> > +     .gdscr = 0x77004,
> > +     .pd = {
> > +             .name = "ufs_phy_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> > +};
> > +
> >  static struct gdsc usb30_prim_gdsc = {
> > -             .gdscr = 0xf004,
> > -             .pd = {
> > -                     .name = "usb30_prim_gdsc",
> > -             },
> > -             .pwrsts = PWRSTS_OFF_ON,
> > -             .flags = POLL_CFG_GDSCR,
> > +     .gdscr = 0xf004,
> > +     .pd = {
> > +             .name = "usb30_prim_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> >  };
> >
> >  static struct gdsc usb30_sec_gdsc = {
> > -             .gdscr = 0x10004,
> > -             .pd = {
> > -                     .name = "usb30_sec_gdsc",
> > -             },
> > -             .pwrsts = PWRSTS_OFF_ON,
> > -             .flags = POLL_CFG_GDSCR,
> > +     .gdscr = 0x10004,
> > +     .pd = {
> > +             .name = "usb30_sec_gdsc",
> > +     },
> > +     .pwrsts = PWRSTS_OFF_ON,
> > +     .flags = POLL_CFG_GDSCR,
> >  };
> >
> >  static struct clk_regmap *gcc_sm8150_clocks[] = {
> > @@ -3714,6 +3759,11 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
> >  };
> >
> >  static struct gdsc *gcc_sm8150_gdscs[] = {
> > +     [EMAC_GDSC] = &emac_gdsc,
> > +     [PCIE_0_GDSC] = &pcie_0_gdsc,
> > +     [PCIE_1_GDSC] = &pcie_1_gdsc,
> > +     [UFS_CARD_GDSC] = &ufs_card_gdsc,
> > +     [UFS_PHY_GDSC] = &ufs_phy_gdsc,
> >       [USB30_PRIM_GDSC] = &usb30_prim_gdsc,
> >       [USB30_SEC_GDSC] = &usb30_sec_gdsc,
> >  };
> > diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> > index 3e1a91876610..35d80ae411a0 100644
> > --- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
> > +++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> > @@ -241,7 +241,12 @@
> >  #define GCC_USB_PHY_CFG_AHB2PHY_BCR                          28
> >
> >  /* GCC GDSCRs */
> > -#define USB30_PRIM_GDSC                     4
> > -#define USB30_SEC_GDSC                                               5
>
> These constants goes into .dtb files as numbers (4 and 5), changing them
> will cause annoying-to-debug bugs in the transition while people still
> are testing a new kernel with last weeks dtb.
>
> So please add the new constants without affecting these numbers.
>
> Rest looks good.

Ack. I will fix this in v2.

Regards,
Bhupesh

> > +#define EMAC_GDSC                                            0
> > +#define PCIE_0_GDSC                                          1
> > +#define      PCIE_1_GDSC                                             2
> > +#define UFS_CARD_GDSC                                                3
> > +#define UFS_PHY_GDSC                                         4
> > +#define USB30_PRIM_GDSC                                              5
> > +#define USB30_SEC_GDSC                                               6
> >
> >  #endif
> > --
> > 2.34.1
> >
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 245794485719..ada755ad55f7 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -3448,22 +3448,67 @@  static struct clk_branch gcc_video_xo_clk = {
 	},
 };
 
+static struct gdsc emac_gdsc = {
+	.gdscr = 0x6004,
+	.pd = {
+		.name = "emac_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc pcie_0_gdsc = {
+	.gdscr = 0x6b004,
+	.pd = {
+		.name = "pcie_0_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc pcie_1_gdsc = {
+	.gdscr = 0x8d004,
+	.pd = {
+		.name = "pcie_1_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc ufs_card_gdsc = {
+	.gdscr = 0x75004,
+	.pd = {
+		.name = "ufs_card_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc ufs_phy_gdsc = {
+	.gdscr = 0x77004,
+	.pd = {
+		.name = "ufs_phy_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
 static struct gdsc usb30_prim_gdsc = {
-		.gdscr = 0xf004,
-		.pd = {
-			.name = "usb30_prim_gdsc",
-		},
-		.pwrsts = PWRSTS_OFF_ON,
-		.flags = POLL_CFG_GDSCR,
+	.gdscr = 0xf004,
+	.pd = {
+		.name = "usb30_prim_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
 };
 
 static struct gdsc usb30_sec_gdsc = {
-		.gdscr = 0x10004,
-		.pd = {
-			.name = "usb30_sec_gdsc",
-		},
-		.pwrsts = PWRSTS_OFF_ON,
-		.flags = POLL_CFG_GDSCR,
+	.gdscr = 0x10004,
+	.pd = {
+		.name = "usb30_sec_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
 };
 
 static struct clk_regmap *gcc_sm8150_clocks[] = {
@@ -3714,6 +3759,11 @@  static const struct qcom_reset_map gcc_sm8150_resets[] = {
 };
 
 static struct gdsc *gcc_sm8150_gdscs[] = {
+	[EMAC_GDSC] = &emac_gdsc,
+	[PCIE_0_GDSC] = &pcie_0_gdsc,
+	[PCIE_1_GDSC] = &pcie_1_gdsc,
+	[UFS_CARD_GDSC] = &ufs_card_gdsc,
+	[UFS_PHY_GDSC] = &ufs_phy_gdsc,
 	[USB30_PRIM_GDSC] = &usb30_prim_gdsc,
 	[USB30_SEC_GDSC] = &usb30_sec_gdsc,
 };
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
index 3e1a91876610..35d80ae411a0 100644
--- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
+++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
@@ -241,7 +241,12 @@ 
 #define GCC_USB_PHY_CFG_AHB2PHY_BCR				28
 
 /* GCC GDSCRs */
-#define USB30_PRIM_GDSC                     4
-#define USB30_SEC_GDSC						5
+#define EMAC_GDSC						0
+#define PCIE_0_GDSC						1
+#define	PCIE_1_GDSC						2
+#define UFS_CARD_GDSC						3
+#define UFS_PHY_GDSC						4
+#define USB30_PRIM_GDSC						5
+#define USB30_SEC_GDSC						6
 
 #endif