From patchwork Fri Feb 4 07:14:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 12734842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66621C433F5 for ; Fri, 4 Feb 2022 07:15:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348798AbiBDHPC (ORCPT ); Fri, 4 Feb 2022 02:15:02 -0500 Received: from muru.com ([72.249.23.125]:46258 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236288AbiBDHPB (ORCPT ); Fri, 4 Feb 2022 02:15:01 -0500 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id B8A91818C; Fri, 4 Feb 2022 07:14:43 +0000 (UTC) From: Tony Lindgren To: linux-clk@vger.kernel.org Cc: Michael Turquette , Stephen Boyd , Tero Kristo , linux-omap@vger.kernel.org Subject: [PATCH 3/8] clk: ti: Optionally parse IO address from parent clock node Date: Fri, 4 Feb 2022 09:14:44 +0200 Message-Id: <20220204071449.16762-4-tony@atomide.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220204071449.16762-1-tony@atomide.com> References: <20220204071449.16762-1-tony@atomide.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org If no reg property is specified for a TI clock, let's try to use the parent clock node IO address. This way we can avoid duplicate devicetree reg properties that cause warnings for unique_unit_address. Signed-off-by: Tony Lindgren --- drivers/clk/ti/clk.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -274,6 +274,8 @@ int ti_clk_get_reg_addr(struct device_node *node, int index, for (i = 0; i < CLK_MAX_MEMMAPS; i++) { if (clocks_node_ptr[i] == node->parent) break; + if (clocks_node_ptr[i] == node->parent->parent) + break; } if (i == CLK_MAX_MEMMAPS) { @@ -284,8 +286,12 @@ int ti_clk_get_reg_addr(struct device_node *node, int index, reg->index = i; if (of_property_read_u32_index(node, "reg", index, &val)) { - pr_err("%pOFn must have reg[%d]!\n", node, index); - return -EINVAL; + if (of_property_read_u32_index(node->parent, "reg", + index, &val)) { + pr_err("%pOFn or parent must have reg[%d]!\n", + node, index); + return -EINVAL; + } } reg->offset = val;