diff mbox series

clk: renesas: rzg2l-cpg: Add id to struct rzg2l_reset

Message ID 20220209172236.21151-1-biju.das.jz@bp.renesas.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series clk: renesas: rzg2l-cpg: Add id to struct rzg2l_reset | expand

Commit Message

Biju Das Feb. 9, 2022, 5:22 p.m. UTC
We now have the reset ID split between common and additional entries.
But the index is hidden inside the DEF_RST macro and this can create
compilation issue when we add a reset ID on the additional entry
array.

This patch adds id to struct rzg2l_reset, so that we can lookup an
ID entry in the reset table instead of just using the ID as the
index.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/clk/renesas/rzg2l-cpg.c | 17 +++++++++++++----
 drivers/clk/renesas/rzg2l-cpg.h |  7 +++++--
 2 files changed, 18 insertions(+), 6 deletions(-)

Comments

Biju Das Feb. 9, 2022, 8:38 p.m. UTC | #1
Hi All,

I would like to drop this patch, as I posted another patch using shared array
for resets[1].

[1] https://lore.kernel.org/linux-renesas-soc/20220209203411.22332-1-biju.das.jz@bp.renesas.com/T/#u

Regards,
Biju

> Subject: [PATCH] clk: renesas: rzg2l-cpg: Add id to struct rzg2l_reset
> 
> We now have the reset ID split between common and additional entries.
> But the index is hidden inside the DEF_RST macro and this can create
> compilation issue when we add a reset ID on the additional entry array.
> 
> This patch adds id to struct rzg2l_reset, so that we can lookup an ID
> entry in the reset table instead of just using the ID as the index.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  drivers/clk/renesas/rzg2l-cpg.c | 17 +++++++++++++----
> drivers/clk/renesas/rzg2l-cpg.h |  7 +++++--
>  2 files changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-
> cpg.c index 8c0a6252c984..adb3353a419d 100644
> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -760,13 +760,22 @@ static int rzg2l_cpg_reset_xlate(struct
> reset_controller_dev *rcdev,
>  	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
>  	const struct rzg2l_cpg_info *info = priv->info;
>  	unsigned int id = reset_spec->args[0];
> +	unsigned int i;
> +
> +	if (id >= rcdev->nr_resets)
> +		goto err;
> 
> -	if (id >= rcdev->nr_resets || !info->resets[id].off) {
> -		dev_err(rcdev->dev, "Invalid reset index %u\n", id);
> -		return -EINVAL;
> +	for (i = 0; i < rcdev->nr_resets; i++) {
> +		if (info->resets[i].id == id)
> +			break;
>  	}
> 
> -	return id;
> +	if (info->resets[i].off)
> +		return i;
> +
> +err:
> +	dev_err(rcdev->dev, "Invalid reset index %u\n", id);
> +	return -EINVAL;
>  }
> 
>  static int rzg2l_cpg_reset_controller_register(struct rzg2l_cpg_priv
> *priv) diff --git a/drivers/clk/renesas/rzg2l-cpg.h
> b/drivers/clk/renesas/rzg2l-cpg.h index 92c88f42ca7f..fe2bcf9cce5d 100644
> --- a/drivers/clk/renesas/rzg2l-cpg.h
> +++ b/drivers/clk/renesas/rzg2l-cpg.h
> @@ -150,16 +150,19 @@ struct rzg2l_mod_clk {
>   *
>   * @off: register offset
>   * @bit: reset bit
> + * @id: reset index
>   */
>  struct rzg2l_reset {
>  	u16 off;
>  	u8 bit;
> +	u8 id;
>  };
> 
>  #define DEF_RST(_id, _off, _bit)	\
> -	[_id] = { \
> +	{ \
>  		.off = (_off), \
> -		.bit = (_bit) \
> +		.bit = (_bit), \
> +		.id = (_id) \
>  	}
> 
>  /**
> --
> 2.17.1
diff mbox series

Patch

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 8c0a6252c984..adb3353a419d 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -760,13 +760,22 @@  static int rzg2l_cpg_reset_xlate(struct reset_controller_dev *rcdev,
 	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
 	const struct rzg2l_cpg_info *info = priv->info;
 	unsigned int id = reset_spec->args[0];
+	unsigned int i;
+
+	if (id >= rcdev->nr_resets)
+		goto err;
 
-	if (id >= rcdev->nr_resets || !info->resets[id].off) {
-		dev_err(rcdev->dev, "Invalid reset index %u\n", id);
-		return -EINVAL;
+	for (i = 0; i < rcdev->nr_resets; i++) {
+		if (info->resets[i].id == id)
+			break;
 	}
 
-	return id;
+	if (info->resets[i].off)
+		return i;
+
+err:
+	dev_err(rcdev->dev, "Invalid reset index %u\n", id);
+	return -EINVAL;
 }
 
 static int rzg2l_cpg_reset_controller_register(struct rzg2l_cpg_priv *priv)
diff --git a/drivers/clk/renesas/rzg2l-cpg.h b/drivers/clk/renesas/rzg2l-cpg.h
index 92c88f42ca7f..fe2bcf9cce5d 100644
--- a/drivers/clk/renesas/rzg2l-cpg.h
+++ b/drivers/clk/renesas/rzg2l-cpg.h
@@ -150,16 +150,19 @@  struct rzg2l_mod_clk {
  *
  * @off: register offset
  * @bit: reset bit
+ * @id: reset index
  */
 struct rzg2l_reset {
 	u16 off;
 	u8 bit;
+	u8 id;
 };
 
 #define DEF_RST(_id, _off, _bit)	\
-	[_id] = { \
+	{ \
 		.off = (_off), \
-		.bit = (_bit) \
+		.bit = (_bit), \
+		.id = (_id) \
 	}
 
 /**