From patchwork Thu Mar 10 15:57:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 657F0C433EF for ; Thu, 10 Mar 2022 15:58:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239535AbiCJP7a (ORCPT ); Thu, 10 Mar 2022 10:59:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239465AbiCJP72 (ORCPT ); Thu, 10 Mar 2022 10:59:28 -0500 Received: from relay12.mail.gandi.net (relay12.mail.gandi.net [IPv6:2001:4b98:dc4:8::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 723AE15F35C; Thu, 10 Mar 2022 07:58:22 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 00C9E20000E; Thu, 10 Mar 2022 15:58:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646927900; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jpeaOG5nnpAyO8y3G2f6g1+6+hMraPiSI/fGW8VNsxA=; b=TEVMrhgQq3tlKTNn5B6TRrXzOVlX9oTS0RJCPcVG1CZh5DVBOOoXt5zIR0Vjaq9GcqYGFv 4S+3KNXlInNGHQvRpKSY3SKiMIiHkAL+uoifgaNRBDX/M8P+3h/57fzxIxP5I4V/xtnKYb cDgAaOukkPMGrgfknxu7vi0Fp8Wf4XK+dcBP//5uZnhIVNJ27B3LK57GwpPqn44G4AeCs1 5mFuEqkEOnjSQ0SxkVXc5kRcwphmdHzcAWbgIVwF0AmsbgAd8JZs8Rpab46k346CdqS+qf YQwjMMetNCW0AbtQdm/cXZelj85BwjZxx/tEVw0Nb1O1mRwsAgwCn3n7ffKhxA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Vinod Koul , dmaengine@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH v4 7/9] dma: dw: Avoid partial transfers Date: Thu, 10 Mar 2022 16:57:53 +0100 Message-Id: <20220310155755.287294-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310155755.287294-1-miquel.raynal@bootlin.com> References: <20220310155755.287294-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org As investigated by Phil Edworthy on RZN1 a while ago, pausing a partial transfer only causes data to be written to memory that is a multiple of the memory width setting. Such a situation can happen eg. because of a char timeout interrupt on a UART. In this case, the current ->terminate_all() implementation does not always flush the remaining data as it should. In order to workaround this, a solutions is to resume and then pause again the transfer before termination. The resume call in practice actually flushes the remaining data. Reported-by: Phil Edworthy Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal --- drivers/dma/dw/core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 7ab83fe601ed..2f6183177ba5 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -862,6 +862,10 @@ static int dwc_terminate_all(struct dma_chan *chan) clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags); + /* Ensure the last byte(s) are drained before disabling the channel */ + if (test_bit(DW_DMA_IS_PAUSED, &dwc->flags)) + dwc_chan_resume(dwc, true); + dwc_chan_pause(dwc, true); dwc_chan_disable(dw, dwc);