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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id i16-20020a2e5410000000b0024647722a4asm3496408ljb.29.2022.03.13.16.31.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 16:31:28 -0700 (PDT) From: Linus Walleij To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Linus Walleij , Ulf Hansson , devicetree@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: clock: u8500: Add clkout clock bindings Date: Mon, 14 Mar 2022 00:29:25 +0100 Message-Id: <20220313232926.1004842-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This adds device tree bindings for the externally routed clocks CLKOUT1 and CLKOUT2 clocks found in the DB8500. Cc: Ulf Hansson Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- .../bindings/clock/stericsson,u8500-clks.yaml | 16 ++++++++++++++++ include/dt-bindings/clock/ste-db8500-clkout.h | 17 +++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 include/dt-bindings/clock/ste-db8500-clkout.h diff --git a/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml b/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml index 9bc95a308477..afd049be948a 100644 --- a/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml +++ b/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml @@ -109,6 +109,22 @@ properties: additionalProperties: false + clkout-clock: + description: A subnode with three clock cells for externally routed clocks, + output clocks. These are two PRCMU-internal clocks that can be divided and + muxed out on the pads of the DB8500 SoC. The first cell indicates which + output clock we are using, possible values are 0 (CLKOUT1) and 1 (CLKOUT2). + The second cell indicates which clock we want to use as source, possible + values are 0 thru 7, see the defines for the different source clocks. + The third cell is a divider, legal values are 1 thru 63. + type: object + + properties: + '#clock-cells': + const: 3 + + additionalProperties: false + required: - compatible - reg diff --git a/include/dt-bindings/clock/ste-db8500-clkout.h b/include/dt-bindings/clock/ste-db8500-clkout.h new file mode 100644 index 000000000000..ca07cb2bd1bc --- /dev/null +++ b/include/dt-bindings/clock/ste-db8500-clkout.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __STE_CLK_DB8500_CLKOUT_H__ +#define __STE_CLK_DB8500_CLKOUT_H__ + +#define DB8500_CLKOUT_1 0 +#define DB8500_CLKOUT_2 1 + +#define DB8500_CLKOUT_SRC_CLK38M 0 +#define DB8500_CLKOUT_SRC_ACLK 1 +#define DB8500_CLKOUT_SRC_SYSCLK 2 +#define DB8500_CLKOUT_SRC_LCDCLK 3 +#define DB8500_CLKOUT_SRC_SDMMCCLK 4 +#define DB8500_CLKOUT_SRC_TVCLK 5 +#define DB8500_CLKOUT_SRC_TIMCLK 6 +#define DB8500_CLKOUT_SRC_CLK009 7 + +#endif