Message ID | 20220422060152.13534-15-rex-bc.chen@mediatek.com (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | Cleanup MediaTek clk reset drivers and support MT8192/MT8195 | expand |
On 22/04/2022 08:01, Rex-BC Chen wrote: > To support reset of infra_ao, add the bit definition for thermal/SVS. > > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > --- > include/dt-bindings/reset/mt8195-resets.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h > index a26bccc8b957..2479680616fb 100644 > --- a/include/dt-bindings/reset/mt8195-resets.h > +++ b/include/dt-bindings/reset/mt8195-resets.h > @@ -26,4 +26,11 @@ > > #define MT8195_TOPRGU_SW_RST_NUM 16 > > +/* INFRA RST0 */ > +#define MT8195_INFRA_RST0_THERMAL_AP_RST 0 > +/* INFRA RST3 */ > +#define MT8195_INFRA_RST3_PTP_RST 5 > +/* INFRA RST4 */ > +#define MT8195_INFRA_RST4_THERMAL_MCU_RST 10 Same comments as for other reset. Best regards, Krzysztof
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h index a26bccc8b957..2479680616fb 100644 --- a/include/dt-bindings/reset/mt8195-resets.h +++ b/include/dt-bindings/reset/mt8195-resets.h @@ -26,4 +26,11 @@ #define MT8195_TOPRGU_SW_RST_NUM 16 +/* INFRA RST0 */ +#define MT8195_INFRA_RST0_THERMAL_AP_RST 0 +/* INFRA RST3 */ +#define MT8195_INFRA_RST3_PTP_RST 5 +/* INFRA RST4 */ +#define MT8195_INFRA_RST4_THERMAL_MCU_RST 10 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
To support reset of infra_ao, add the bit definition for thermal/SVS. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> --- include/dt-bindings/reset/mt8195-resets.h | 7 +++++++ 1 file changed, 7 insertions(+)