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[V3,17/17] arm64: dts: mediatek: Add infra #reset-cells property for MT8192

Message ID 20220422060152.13534-18-rex-bc.chen@mediatek.com (mailing list archive)
State Superseded, archived
Headers show
Series Cleanup MediaTek clk reset drivers and support MT8192/MT8195 | expand

Commit Message

Rex-BC Chen (陳柏辰) April 22, 2022, 6:01 a.m. UTC
To support reset of infra, we add property of #reset-cells.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 411feb294613..66ff18344ac2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -269,6 +269,7 @@ 
 			compatible = "mediatek,mt8192-infracfg", "syscon";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+			#reset-cells = <2>;
 		};
 
 		pericfg: syscon@10003000 {