Message ID | 20220508104855.78804-11-robimarko@gmail.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | [v3,01/11] clk: qcom: ipq8074: fix NSS core PLL-s | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index ba81c510dd39..0bc21b0c177f 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -383,6 +383,7 @@ gcc: gcc@1800000 { reg = <0x01800000 0x80000>; #clock-cells = <0x1>; #reset-cells = <0x1>; + #power-domain-cells = <1>; }; tcsr_mutex: hwlock@1905000 { @@ -610,6 +611,8 @@ usb_0: usb@8af8800 { <133330000>, <19200000>; + power-domains = <&gcc USB0_GDSC>; + resets = <&gcc GCC_USB0_BCR>; status = "disabled"; @@ -650,6 +653,8 @@ usb_1: usb@8cf8800 { <133330000>, <19200000>; + power-domains = <&gcc USB1_GDSC>; + resets = <&gcc GCC_USB1_BCR>; status = "disabled";
Add USB power domains provided by GCC GDSCs. Add the required #power-domain-cells to the GCC as well. Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 5 +++++ 1 file changed, 5 insertions(+)