| Message ID | 20220519125527.18544-18-rex-bc.chen@mediatek.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Cleanup MediaTek clk reset drivers and support SoCs | expand |
On Thu, 19 May 2022 20:55:25 +0800, Rex-BC Chen wrote: > To support reset of infra_ao, add the index of infra_ao reset of > thermal/svs for MT8186. > > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > --- > include/dt-bindings/reset/mt8186-resets.h | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h index 5f850370c42c..2e9029c22f38 100644 --- a/include/dt-bindings/reset/mt8186-resets.h +++ b/include/dt-bindings/reset/mt8186-resets.h @@ -7,6 +7,7 @@ #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186 #define _DT_BINDINGS_RESET_CONTROLLER_MT8186 +/* TOPRGU resets */ #define MT8186_TOPRGU_INFRA_SW_RST 0 #define MT8186_TOPRGU_MM_SW_RST 1 #define MT8186_TOPRGU_MFG_SW_RST 2 @@ -33,4 +34,8 @@ /* MMSYS resets */ #define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19 +/* INFRA resets */ +#define MT8186_INFRA_THERMAL_CTRL_RST 0 +#define MT8186_INFRA_PTP_CTRL_RST 1 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
To support reset of infra_ao, add the index of infra_ao reset of thermal/svs for MT8186. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> --- include/dt-bindings/reset/mt8186-resets.h | 5 +++++ 1 file changed, 5 insertions(+)