| Message ID | 20220523092314.14252-2-quic_tdas@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add support for audio clock gating resets for SC7280 | expand |
On Mon, May 23, 2022 at 02:53:12PM +0530, Taniya Das wrote: > Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks > for SC7280. Update reg property min/max items in YAML schema. > > Fixes: 57405b795504 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280"). > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > --- > .../clock/qcom,sc7280-lpasscorecc.yaml | 20 ++++++++++++++++--- > .../clock/qcom,lpassaudiocc-sc7280.h | 5 +++++ > 2 files changed, 22 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > index bad9135489de..f066e8c57bbf 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > @@ -22,6 +22,8 @@ properties: > > clock-names: true > > + reg: true > + > compatible: > enum: > - qcom,sc7280-lpassaoncc > @@ -38,8 +40,8 @@ properties: > '#power-domain-cells': > const: 1 > > - reg: > - maxItems: 1 > + '#reset-cells': > + const: 1 > > required: > - compatible > @@ -69,6 +71,12 @@ allOf: > items: > - const: bi_tcxo > - const: lpass_aon_cc_main_rcg_clk_src > + > + reg: > + maxItems: 2 Don't need maxItems. 2 is implied from 'items' length. > + items: > + - description: lpass core cc register > + - description: lpass audio csr register > - if: > properties: > compatible: > @@ -90,6 +98,8 @@ allOf: > - const: bi_tcxo_ao > - const: iface > > + reg: > + maxItems: 1 > - if: > properties: > compatible: > @@ -108,6 +118,8 @@ allOf: > items: > - const: bi_tcxo > > + reg: > + maxItems: 1 > examples: > - | > #include <dt-bindings/clock/qcom,rpmh.h> > @@ -116,13 +128,15 @@ examples: > #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> > lpass_audiocc: clock-controller@3300000 { > compatible = "qcom,sc7280-lpassaudiocc"; > - reg = <0x3300000 0x30000>; > + reg = <0x3300000 0x30000>, > + <0x32a9000 0x1000>; > clocks = <&rpmhcc RPMH_CXO_CLK>, > <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; > clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; > power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; > #clock-cells = <1>; > #power-domain-cells = <1>; > + #reset-cells = <1>; > }; > > - | > diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h > index 20ef2ea673f3..22dcd47d4513 100644 > --- a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h > +++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h > @@ -24,6 +24,11 @@ > #define LPASS_AUDIO_CC_RX_MCLK_CLK 14 > #define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15 > > +/* LPASS AUDIO CC CSR */ > +#define LPASS_AUDIO_SWR_RX_CGCR 0 > +#define LPASS_AUDIO_SWR_TX_CGCR 1 > +#define LPASS_AUDIO_SWR_WSA_CGCR 2 > + > /* LPASS_AON_CC clocks */ > #define LPASS_AON_CC_PLL 0 > #define LPASS_AON_CC_PLL_OUT_EVEN 1 > -- > 2.17.1 > >
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index bad9135489de..f066e8c57bbf 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -22,6 +22,8 @@ properties: clock-names: true + reg: true + compatible: enum: - qcom,sc7280-lpassaoncc @@ -38,8 +40,8 @@ properties: '#power-domain-cells': const: 1 - reg: - maxItems: 1 + '#reset-cells': + const: 1 required: - compatible @@ -69,6 +71,12 @@ allOf: items: - const: bi_tcxo - const: lpass_aon_cc_main_rcg_clk_src + + reg: + maxItems: 2 + items: + - description: lpass core cc register + - description: lpass audio csr register - if: properties: compatible: @@ -90,6 +98,8 @@ allOf: - const: bi_tcxo_ao - const: iface + reg: + maxItems: 1 - if: properties: compatible: @@ -108,6 +118,8 @@ allOf: items: - const: bi_tcxo + reg: + maxItems: 1 examples: - | #include <dt-bindings/clock/qcom,rpmh.h> @@ -116,13 +128,15 @@ examples: #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> lpass_audiocc: clock-controller@3300000 { compatible = "qcom,sc7280-lpassaudiocc"; - reg = <0x3300000 0x30000>; + reg = <0x3300000 0x30000>, + <0x32a9000 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; #clock-cells = <1>; #power-domain-cells = <1>; + #reset-cells = <1>; }; - | diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h index 20ef2ea673f3..22dcd47d4513 100644 --- a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h +++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h @@ -24,6 +24,11 @@ #define LPASS_AUDIO_CC_RX_MCLK_CLK 14 #define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15 +/* LPASS AUDIO CC CSR */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 +#define LPASS_AUDIO_SWR_TX_CGCR 1 +#define LPASS_AUDIO_SWR_WSA_CGCR 2 + /* LPASS_AON_CC clocks */ #define LPASS_AON_CC_PLL 0 #define LPASS_AON_CC_PLL_OUT_EVEN 1
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks for SC7280. Update reg property min/max items in YAML schema. Fixes: 57405b795504 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280"). Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- .../clock/qcom,sc7280-lpasscorecc.yaml | 20 ++++++++++++++++--- .../clock/qcom,lpassaudiocc-sc7280.h | 5 +++++ 2 files changed, 22 insertions(+), 3 deletions(-) -- 2.17.1