| Message ID | 20220523102339.21927-2-matthias.bgg@kernel.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | Delete MT8192 msdc gate (was "clk: mediatek: Delete MT8192 msdc gate") | expand |
On Mon, 23 May 2022 12:23:38 +0200, matthias.bgg@kernel.org wrote: > From: Matthias Brugger <matthias.bgg@gmail.com> > > The code controlling msdc clock gate was moved inthe the consumer, the MMC > driver. This node did never represent a working implementation of any > peripheral. It was just a lonely clock gate that wasn't used. Delete the > binding description of this node. > > Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Miles Chen <miles.chen@mediatek.com> > > --- > > Changes in v3: > - Update commit message to explain better why we do ABI breakage here > > Changes in v2: > - Delete compatible in binding descprition as well > - Add RvB tags > > .../bindings/arm/mediatek/mediatek,mt8192-clock.yaml | 8 -------- > 1 file changed, 8 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
Quoting matthias.bgg@kernel.org (2022-05-23 03:23:38) > From: Matthias Brugger <matthias.bgg@gmail.com> > > The code controlling msdc clock gate was moved inthe the consumer, the MMC > driver. This node did never represent a working implementation of any > peripheral. It was just a lonely clock gate that wasn't used. Delete the > binding description of this node. > > Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Miles Chen <miles.chen@mediatek.com> > > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml index c8c67c033f8c..b57cc2e69efb 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml @@ -24,7 +24,6 @@ properties: - mediatek,mt8192-imp_iic_wrap_w - mediatek,mt8192-imp_iic_wrap_n - mediatek,mt8192-msdc_top - - mediatek,mt8192-msdc - mediatek,mt8192-mfgcfg - mediatek,mt8192-imgsys - mediatek,mt8192-imgsys2 @@ -107,13 +106,6 @@ examples: #clock-cells = <1>; }; - - | - msdc: clock-controller@11f60000 { - compatible = "mediatek,mt8192-msdc"; - reg = <0x11f60000 0x1000>; - #clock-cells = <1>; - }; - - | mfgcfg: clock-controller@13fbf000 { compatible = "mediatek,mt8192-mfgcfg";