Message ID | 20220621160621.24415-2-y.oudjana@protonmail.com (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | clk: qcom: msm8996-cpu: Cleanup and migrate to parent_data | expand |
On Tue, 21 Jun 2022 at 19:07, Yassine Oudjana <yassine.oudjana@gmail.com> wrote: > > From: Yassine Oudjana <y.oudjana@protonmail.com> > > The parent at this index is the secondary mux, which can connect > not only to primary PLL/2 but also to XO. Rename the index to SMUX_INDEX > to better reflect the parent. > > Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/clk/qcom/clk-cpu-8996.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index 4a4fde8dd12d..5dc68dc3621f 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -61,7 +61,7 @@ #include "clk-regmap.h" enum _pmux_input { - DIV_2_INDEX = 0, + SMUX_INDEX = 0, PLL_INDEX, ACD_INDEX, ALT_INDEX, @@ -468,7 +468,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, case POST_RATE_CHANGE: if (cnd->new_rate < DIV_2_THRESHOLD) ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, - DIV_2_INDEX); + SMUX_INDEX); else ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, ACD_INDEX);